Bhabani P. Sinha, Pradip K. Srimani. An O(log n) Parallel Algorithm for Binary Multiplication and its VLSI implementation. In Proceedings of the 8th IEEE Real-Time Systems Symposium (RTSS 87), December 1-3, 1987, San Jose, Califorinia, USA. pages 54-62, IEEE Computer Society, 1987.
@inproceedings{SinhaS87,
title = {An O(log n) Parallel Algorithm for Binary Multiplication and its VLSI implementation},
author = {Bhabani P. Sinha and Pradip K. Srimani},
year = {1987},
researchr = {https://researchr.org/publication/SinhaS87},
cites = {0},
citedby = {0},
pages = {54-62},
booktitle = {Proceedings of the 8th IEEE Real-Time Systems Symposium (RTSS 87), December 1-3, 1987, San Jose, Califorinia, USA},
publisher = {IEEE Computer Society},
isbn = {0-8186-0815-3},
}