Fast Parallel Algorithms for Binary Multiplication and Their Implementation on Systolic Architectures

Bhabani P. Sinha, Pradip K. Srimani. Fast Parallel Algorithms for Binary Multiplication and Their Implementation on Systolic Architectures. IEEE Transactions on Computers, 38(3):424-431, 1989.

Authors

Bhabani P. Sinha

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Pradip K. Srimani

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