Hardware transactional memory on multi-processor FPGA platform - researchr publication authors

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Jeevan Sirkunan, Chia Yee Ooi, Nasir Shaikh-Husin, Yuan Wen Hau, Muhammad Nadzir Marsono. Hardware transactional memory on multi-processor FPGA platform. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 2744-2747, IEEE, 2014. [doi]

This author has not been identified. Look up 'Jeevan Sirkunan' in GoogleThis author has not been identified. Look up 'Chia Yee Ooi' in GoogleThis author has not been identified. Look up 'Nasir Shaikh-Husin' in GoogleThis author has not been identified. Look up 'Yuan Wen Hau' in GoogleThis author has not been identified. Look up 'Muhammad Nadzir Marsono' in Google

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