Table of Contents

• Adaptive reweighted compressed sensing for image compressionShuyuan Zhu, Bing Zeng, Moncef Gabbouj. 1-4 [doi]
• Multi-level low-complexity coefficient discarding scheme for video encoderChuang Zhu, Huizhu Jia, Jie Liu, Xianghu Ji, Hao Lv, Xiaodong Xie, Wen Gao. 5-8 [doi]
• Fast intra block copy (IntraBC) search for HEVC screen content codingDo-Kyoung Kwon, Madhukar Budagavi. 9-12 [doi]
• Low-complexity advanced residual prediction design in 3D-HEVCLi Zhang, Ying Chen, Xiang Li, Shanhua Xue. 13-16 [doi]
• Inter-view motion prediction in 3D-HEVCLi Zhang, Ying Chen, Vijayaraghavan Thirumalai, Jian-Liang Lin, Yi-Wen Chen, Jicheng An, Shawmin Lei, Laurent Guillo, Thomas Guionnet, Christine Guillemot. 17-20 [doi]
• A fully-differential input amplifier with band-pass filter for biosensorsXin Meng, Wei Li, Gabor C. Temes. 21-24 [doi]
• CMOS transimpedance amplifier for biosensor signal acquisitionMark M. R. Ibrahim, Peter M. Levine. 25-28 [doi]
• Charge-conserved analog-to-time converter for a large-scale CMOS biosensor arrayMasayuki Takihi, Kiichi Niitsu, Kazuo Nakazato. 33-36 [doi]
• A temperature insensitive continuous time ΔpH to digital converterMohammadreza Sohbati, Christofer Toumazou. 37-40 [doi]
• 1kHz 2D silicon retina motion sensor platformAndreas Steiner, Rico Moeckel, Reto Thurer, Dario Floreano, Tobi Delbrück, Shih-Chii Liu. 41-44 [doi]
• Design of A 128 × 128 CMOS APS with extended noise suppression for high and low light imaging applicationsArthur Spivak, Orly Yadid-Pecht. 45-48 [doi]
• An Embedded Vision Engine (EVE) for automotive vision processingDipan Kumar Mandal, Jagadeesh Sankaran, Akshay Gupta, Kyle Castille, Shraddha Gondkar, Sanmati Kamath, Pooja Sundar, Alan Phipps. 49-52 [doi]
• A 10kfps 32×32 integrated test platform for electrical characterization of imagersJosep Maria Margarit, Lluís Terés, Enric Cabruja, Francisco Serra-Graells. 53-56 [doi]
• An 1.61mW mixed-signal column processor for BRISK feature extraction in CMOS image sensorKyeongryeol Bong, Gyeonghoon Kim, Injoon Hong, Hoi-Jun Yoo. 57-60 [doi]
• On feedback systems built around cut-inserted ideal transformerIgor M. Filanovsky. 61-64 [doi]
• Analytic bounds on amplifier gain-bandwidth product from complex power flowJeffrey Harrison. 65-68 [doi]
• A study on linear single-loop feedback systems using geometric vectorsQinfeng Zhang, Fengyi Huang. 69-72 [doi]
• A time-mode translinear principle for implementing analog multiplicationRobert D'Angelo, Sameer R. Sonkusale. 73-76 [doi]
• Analyzing distortion in ASDMs with loop delayAmir Babaie-Fishani, Maarten De Bock, Pieter Rombouts. 77-80 [doi]
• An ultra-low-power extended counting ADC For large scale sensor arraysCencen Gao, Dong Wu, Hui Liu, Nan Xie, Liyang Pan. 81-84 [doi]
• A 0.1pJ Freeze Vernier time-to-digital converter in 65nm CMOSKristof Blutman, Jan Angevare, Amir Zjajo, Nick van der Meijs. 85-88 [doi]
• Analog-to-Digital Converters with embedded IF mixing using variable reference voltagesNuno Pereira, João Goes, Luís Bica Oliveira, Rui Dinis. 89-92 [doi]
• A subsampling stochastic coarse-fine ADC with SNR 55.3dB and >5.8TS/s effective sample rate for an on-chip signal analyzerJames S. Tandon, Takahiro J. Yamaguchi, Satoshi Komatsu, Kunihiro Asada. 93-96 [doi]
• A sub-ranging 2-Step 7-bit self-calibrated comparator-based binary-search ADCFabio Alex Rabuske, Taimur Gibran Rabuske, Jorge R. Fernandes. 97-100 [doi]
• Design and implementation of a bidirectional SEPIC-Zeta DC-DC ConverterHsiang-Yuan Lee, Tsorng-Juu Liang, Jiann-Fuh Chen, Kai-Hui Chen. 101-104 [doi]
• Class DE current driven low di/dt rectifierYutaro Minami, Hirotaka Koizumi. 105-108 [doi]
• A design method for single phase Z-source inverterSho Takeuchi, Naoki Yamashita, Hirotaka Koizumi. 109-112 [doi]
• 2 DC-DC converterTomoharu Nagashima, Kazuhide Inoue, Xiuqin Wei, Elisenda Bou, Eduard Alarcón, Marian K. Kazimierczuk, Hiroo Sekiya. 113-116 [doi]
• Pseudorandom carrier based subharmonic PWM for cascaded multilevel invertersT. Ramanathan, R. Ramesh, C. K. Subramaniam, K. Ganesan. 117-120 [doi]
• Speech enhancement based on L1 regularization in the cepstral domainTak-Wai Shen, Daniel Pak-Kong Lun. 121-124 [doi]
• A blind LWT-based audio watermarking using fast Walsh Hadamard transform and singular value decompositionPranab Kumar Dhar, Tetsuya Shimamura. 125-128 [doi]
• Packet-loss robust scalable speech coding using the discrete wavelet transformKoji Seto, Tokunbo Ogunfunmi. 129-132 [doi]
• Microphone array based speech spectral amplitude estimators with phase estimationMahdi Parchami, Wei-Ping Zhu, Benoît Champagne. 133-136 [doi]
• Speech emotion recognition based on entropy of enhanced wavelet coefficientsSharifa Sultana, Celia Shahnaz, Shaikh Anowarul Fattah, Istak Ahmmed, Wei-Ping Zhu, M. Omair Ahmad. 137-140 [doi]
• Multiple-clock multiple-edge-triggered multiple-bit flip-flops for two-phase handshaking asynchronous circuitsMasashi Imai, Tomohiro Yoneda. 141-144 [doi]
• A 1.8/2.5/3.3V BiCMOS I/O driver with VCC=5VSamiran DasGupta, Devraj Rajagopal. 145-148 [doi]
• A cost-efficient self-checking register architecture for radiation hardened designsYang Lin, Mark Zwolinski. 149-152 [doi]
• Synthesis of asynchronous QDI circuits using synchronous coding specificationsRong Zhou, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang, Weng-Geng Ho. 153-156 [doi]
• A 2 GOPS quad-mean shift processor with early termination for machine learning applicationsChang-Hung Tsai, Hui-Hsuan Lee, Wan-Ju Yu, Chen-Yi Lee. 157-160 [doi]
• Improving high-level synthesis effectiveness through custom operator identificationChenglong Xiao, Emmanuel Casseau. 161-164 [doi]
• A design approach to automatically synthesize ANSI-C assertions during High-Level Synthesis of hardware acceleratorsMohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec. 165-168 [doi]
• Applied formal methods for hardware Trojan detectionMichael Rathmair, Florian Schupfer, Christian Krieg. 169-172 [doi]
• Enhancing the Unified Logical Effort algorithm for branching and load distributionMehedi Sarwar, James E. Stine. 173-176 [doi]
• A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetryBasireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya. 177-180 [doi]
• rd order harmonic rejection ratioLong Chen, Tao Xia, Ying Guo, Huailin Liao. 181-184 [doi]
• Active duplexing for Software Defined RadioRaheleh Eslampanah, Lance Linton, Shabbir Ahmed, Robabeh Amirkhanzadeh, Mohammadreza Pourakbar, Jean-Michel Redoute, Mike Faulkner. 185-188 [doi]
• Ground-bounce reduction in narrow-band RF front-endsAbhishek Kumar, Sankaran Aniruddhan. 189-192 [doi]
• Energy efficient SQRD processor for LTE-A using a group-sort update schemeChenxin Zhang, Hemanth Prabhu, Liang Liu, Ove Edfors, Viktor Öwall. 193-196 [doi]
• Iterative characterisation approach using realistic excitation signals for linearisation of transmittersJunqing Guan, Xuan Anh Nghiem, Renato Negra. 197-200 [doi]
• Multilevel error correction scheme for MLC flash memoryZhiqiang Cui, Zhongfeng Wang, Xinming Huang. 201-204 [doi]
• Architectures for polar BP decoders using foldingBo Yuan, Keshab K. Parhi. 205-208 [doi]
• Hardware architecture for list successive cancellation polar decoderChuan Zhang, Xiaohu You, Jin Sha. 209-212 [doi]
• A low-complexity LDPC decoder for NAND flash applicationsMao-Ruei Li, Hsueh-Chih Chou, Yeong-Luh Ueng, Yun Chen. 213-216 [doi]
• Biosensor systems and applications in genomics, proteomics and metabolomics: A reviewScott MacKay, Jie Chen. 217-220 [doi]
• Design and evaluation of a microcantilever aptasensorYang Choon Lim, Abbas Z. Kouzani, Wei Duan, Xiujuan J. Dai, Akif Kaynak, Douglas Mair. 221-224 [doi]
• A microsystem for magnetic immunoassay towards protein toxins detectionYushan Zheng, Mohamad Sawan. 225-228 [doi]
• Floating gate ISFET for therapeutic drug screening of breast cancer cellsSahil Shah, Karen S. Anderson, Jennifer Blain Christen, Jennifer Hasler. 229-232 [doi]
• Fully integrated CMOS capacitive sensor for Lab-on-Chip applicationsGhazal Nabovati, Ebrahim Ghafar-Zadeh, Maryam Mirzaei, Giancarlo Ayala-Charca, Falah R. Awwad, Mohamad Sawan. 233-236 [doi]
• A high-voltage-tolerant stimulator realized in the low-voltage CMOS process for cochlear implantKuan-Yu Lin, Ming-Dou Ker, Chun-Yu Lin. 237-240 [doi]
• Biphasic, energy-efficient, current-controlled stimulation back-end for retinal visual prosthesisMohammad Hossein Maghami, Amir M. Sodagar, Mohamad Sawan. 241-244 [doi]
• Power management system for a capsule endoscope using autofluorescence imagingMohammed Al-Rawhani, James Beeley, David R. S. Cumming. 245-248 [doi]
• A CMOS multi-sine signal generator for multi-frequency bioimpedance measurementsPanagiotis Kassanos, Iasonas F. Triantis. 249-252 [doi]
• A multiple-channel frontend system with current reuse for fetal monitoring applicationsShuang Song, Michael Johannes Rooijakkers, Pieter Harpe, Chiara Rabotti, Massimo Mischi, Arthur H. M. van Roermund, Eugenio Cantatore. 253-256 [doi]
• Event-driven stereo vision with orientation filtersLuis A. Camuñas-Mesa, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Sio-Hoi Ieng, Ryad Benosman. 257-260 [doi]
• Astrocyte on neuronal phase synchrony in CMOSYilda Irizarry-Valle, Alice C. Parker. 261-264 [doi]
• A pulse communication flow ready for accelerated neuromorphic experimentsVasilis N. Thanasoulis, Bernhard Vogginger, Johannes Partzsch, René Schüffny. 265-268 [doi]
• Mapping arbitrary mathematical functions and dynamical systems to neuromorphic VLSI circuits for spike-based neural computationFederico Corradi, Chris Eliasmith, Giacomo Indiveri. 269-272 [doi]
• A bias-scalable current-mode analog support vector machine based on margin propagationMing Gu, Shantanu Chakrabartty. 273-276 [doi]
• Input stimulus comparison using an adaptive FPGA-based testing systemSotirios P. Pouros, Vassilios D. Vassios, Dimitrios K. Papakostas, Alkis A. Hatzopoulos. 277-280 [doi]
• Efficient analog verification against Trojan states using divide and contraction methodYou Li, Degang Chen. 281-284 [doi]
• Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-testXiankun Jin, Nan Sun. 285-288 [doi]
• Identification and break of positive feedback loops in Trojan States Vulnerable CircuitsZhiqiang Liu, You Li, Yan Duan, Randall L. Geiger, Degang Chen. 289-292 [doi]
• LC-VCO automatic synthesis using multi-objective evolutionary techniquesRicardo Povoa, Ricardo Lourenco, Nuno C. Lourenço, António Canelas, Ricardo Martins, Nuno Horta. 293-296 [doi]
• A low frequency-dependence, energy-efficient switching technique for bottom-plate sampled SAR ADCArindam Sanyal, Nan Sun. 297-300 [doi]
• A 10-bit 100MS/s subrange SAR ADC with time-domain quantizationLing Du, Shuangyi Wu, Min Jiang, Ning Ning, Qi Yu, Yang Liu. 301-304 [doi]
• Design and implementation of an 11-bit 50-MS/s split SAR ADC in 65 nm CMOSAnh Trong Huynh, Hoa Thai Duong, Hoang Viet Le, Efstratios Skafidas. 305-308 [doi]
• A 10-bit 150MS/s SAR ADC with parallel segmented DAC in 65nm CMOSXiaoyang Wang, Qiang Li. 309-312 [doi]
• Match enhancement in SAR ADCs by algorithmic unit capacitor assignmentNick Martin, Stephen O'Driscoll. 313-316 [doi]
• A double loop continuous-time adaptive equalizerCecilia Gimeno, Erick Guerrero, Carlos Sanchez-Azqueta, Concepción Aldea, Cristina Azcona, Santiago Celma. 317-320 [doi]
• A 19 µW 20 MHz All-Digital PLL for 2-tone envelope detection radiosGijs Meuleman, Pieter Harpe, Xiongchuan Huang, Arthur H. M. van Roermund. 321-324 [doi]
• An overall gain estimation algorithm for all digital phase locked loopsJing Li, Richard Hagelauer, Thomas Mayer, Stefan Tertinek, Christian Wicpalek, Burkhard Neurauter. 325-328 [doi]
• A 1-GHz direct digital frequency synthesizer in an FPGAMatt Bergeron, Alan N. Willson. 329-332 [doi]
• L-band 180° passive phase shifter employing auto-transformer in an SOS processRobabeh Amirkhanzadeh, Henrik Sjöland, Jean-Michel Redoute, Dan Nobbe, Mike Faulkner. 333-336 [doi]
• Occluded object tracking based on trajectory links in surveillance videosChun-Rong Huang, Yi-I. Chiu, Pau-Choo Chung, Yu-Chiao Hung. 337-340 [doi]
• Birds/bats movement tracking with IR camera for wind farm applicationsLai Wei, Golrokh Mirzaei, Mohammad Wadood Majid, Mohsin M. Jamali, Jeremy Ross, Peter V. Gorsevski, Verner P. Bingman. 341-344 [doi]
• SoC processor for real-time object labeling in life camera streams with low line level latencyZhengqiang Yu, Luc Claesen, Yun Pan, Andy Motten, Yimu Wang, Xiaolang Yan. 345-348 [doi]
• Favorite object extraction using web imagesFanman Meng, Bing Luo, Chao Huang, Liangzhi Tang, Bing Zeng, NiNi Rao. 349-352 [doi]
• Cosegmentation from similar backgroundsFanman Meng, Hongliang Li, King Ngi Ngan, Bing Zeng, NiNi Rao. 353-356 [doi]
• Random error analysis and reduction for stochastic computation based on autocorrelation sequenceYe Cheng, JianHao Hu. 357-360 [doi]
• Additional optimizations for parallel squarer unitsSon Bui, James E. Stine. 361-364 [doi]
• High performance absolute value calculator based on stochastic computingJiangyun Zhou, JianHao Hu, Jienan Chen. 365-368 [doi]
• A novel DA-based architecture for efficient computation of inner-product of variable vectorsPramod Kumar Meher, Sang Yoon Park. 369-372 [doi]
• Architectures for IIR digital filters using stochastic computingKeshab K. Parhi, Yin Liu. 373-376 [doi]
• Automatic data path extraction in large-scale register-transfer level designsWei Song 0002, Jim D. Garside, Doug Edwards. 377-380 [doi]
• A novel design space reduction method for efficient simulation-based optimizationHsing-Han Tseng, Shiou-Wen Wang, Jian-Yu Chen, Chien-Nan Jimmy Liu. 381-384 [doi]
• A constructive approach for threshold logic circuit synthesisAugusto Neutzling, Mayler G. A. Martins, Renato P. Ribas, André Inácio Reis. 385-388 [doi]
• A register clustering algorithm for low power clock tree synthesisChao Deng, Yici Cai, Qiang Zhou. 389-392 [doi]
• Feasible region assignment of routing nets in single-layer routingJin-Tai Yan, Yu-Jen Tseng, Chia-Heng Yen. 393-396 [doi]
• An efficient decoder architecture for cyclic non-binary LDPC codesYichao Lu, Guifen Tian, Satoshi Goto. 397-400 [doi]
• Interleaved successive cancellation polar decodersChuan Zhang, Keshab K. Parhi. 401-404 [doi]
• Efficient symbol reliability based decoding for QCNB-LDPC codesLeixin Zhou, Jin Sha, Yun Chen, Chuan Zhang, Zhongfeng Wang. 405-408 [doi]
• Area-efficient TFM-based stochastic decoder design for non-binary LDPC codesChih-Wen Yang, Xin-Ru Lee, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee. 409-412 [doi]
• Efficient column-layered decoders for single block-row quasi-cyclic LDPC codesChuan Zhang, Xiaohu You, Zhongfeng Wang. 413-416 [doi]
• Scaling and operation characteristics of HfOx based vertical RRAM for 3D cross-point architectureJ. F. Kang, B. Gao, B. Chen, P. Huang, F. F. Zhang, X. Y. Liu, H. Y. Chen, Z. Jiang, H.-S. Philip Wong, Shimeng Yu. 417-420 [doi]
• Design guidelines for 3D RRAM cross-point architectureShimeng Yu, Yexin Deng, Bin Gao, Peng Huang, Bing Chen, Xiaoyan Liu, JinFeng Kang, Hong-Yu Chen, Zizhen Jiang, H.-S. Philip Wong. 421-424 [doi]
• Device engineering and CMOS integration of nanoscale memristorsShuang Pi, Peng Lin, Hao Jiang, Can Li, Qiangfei Xia. 425-427 [doi]
• Selector devices for 3-D cross-point ReRAMEuijun Cha, Jiyong Woo, Daeseok Lee, Sangheon Lee, Hyunsang Hwang. 428-431 [doi]
• The effect of atomic layer deposition temperature on switching properties of HfOx resistive RAM devicesKatrina A. Morgan, Ruomeng Huang, Stuart Pearce, C. H. De Groot. 432-435 [doi]
• Live demonstration: An optimization software and a design case of a novel dual band wireless power and data transmission systemWei Xu, Xiyan Li, Wuxi Li, Hang Yuan, Guoxing Wang. 436 [doi]
• Live demonstration: Using SIMULINK S-functions for the efficient modeling and simulation of analog integrated circuits and systemsJose M. de la Rosa. 437 [doi]
• Live demonstration: A wearable wireless ECG acquisition and specification systemMing-Chun Liang, Cheng-Han Hsieh, Jia-Hua Hong, Shih-Yu Chang Chien, Shuenn-Yuh Lee. 438 [doi]
• Live demonstration: An associative capacitive network based on nanoscale complementary resistive switchesL. Nielen, S. Tappertzhofen, Eike Linn, Omid Kavehei, Stan Skafidas, I. Valov, Rainer Waser. 439 [doi]
• Live demonstration: The "DAVIS" Dynamic and Active-Pixel Vision SensorChristian Brandli, Raphael Berner, Minhao Yang, Shih-Chii Liu, V. Villeneuva, Tobi Delbrück. 440 [doi]
• Live demonstration: A versatile, low-cost platform for testing large ReRAM cross-bar arraysAlexantrou Serb, Radu Berdan, Ali Khiat, Christos Papavassiliou, Themistoklis Prodromakis. 441 [doi]
• Fetal heart rate monitoring system with mobile internetWendi Yang, Kai Yang, Hanjun Jiang, Zhihua Wang, Qingliang Lin, Wen Jia. 443-446 [doi]
• Live demonstration: A sensor-processor array integrated circuit for high-speed real-time machine visionStephen J. Carey, David Robert Wallace Barr, Bin Wang, Alexey Lopich, Piotr Dudek. 447 [doi]
• Information security display system based on temporal psychovisual modulationZhongpai Gao, Guangtao Zhai, Xiongkuo Min. 449-452 [doi]
• A panoramic endoscope design and implementation for Minimally Invasive SurgeryChun-Hsiang Peng, Ching-Hwa Cheng. 453-456 [doi]
• An FPGA design framework for large-scale spiking neural networksRunchun Wang, Tara Julia Hamilton, Jonathan Tapson, André van Schaik. 457-460 [doi]
• Live demonstration: FPGA implementation of the CAR model of the cochleaChetan Singh Thakur, James Wright, Tara Julia Hamilton, Jonathan Tapson, André van Schaik. 461 [doi]
• Spike-based VITE control with dynamic vision sensor applied to an arm robotFernando Perez-Peña, Arturo Morgado Estevez, Teresa Serrano-Gotarredona, Francisco Gomez-Rodriguez, V. Ferrer-Garcia, Angel Jiménez-Fernandez, Alejandro Linares-Barranco. 463-466 [doi]
• Rotationally invariant vision recognition with neuromorphic transformation and learning networksRichard James Sofatzis, Saeed Afshar, Tara Julia Hamilton. 469-472 [doi]
• Live Demonstration: Hierarchical masked image filtering technology on security-camera for privacy protectionYuki Yanagihara, Toshiya Honda, Takeshi Kumaki, Takeshi Fujino. 473 [doi]
• Probabilistic particle modeling of quantum wave propagation with excitation and refractionYuma Kawabata, Hisato Fujisaka, Takeshi Kamio. 474-477 [doi]
• Probabilistic particle modeling of quantum wave propagation with reflection, transmission, and couplingNobuyuki Hirami, Hisato Fujisaka, Takeshi Kamio. 478-481 [doi]
• Chaos in a memcapacitor based circuitAndrew Lewis Fitch, Herbert H. C. Iu, D. S. Yu. 482-485 [doi]
• Period-doubling bifurcation and its boundary study of DFIGWind turbine connected with local interacting unbalanced loads in micro-gridZhen Li, Xiangdong Liu, Siu Chung Wong, Yuehui Huang, Xi Chen. 486-489 [doi]
• Memristor modellingB. Muthuswamy, J. Jevtic, Herbert H. C. Iu, C. K. Subramaniam, K. Ganesan, V. Sankaranarayanan, K. Sethupathi, H. Kim, M. Pd. Shah, Leon O. Chua. 490-493 [doi]
• Topological resiliency analysis of the Australian electricity grid with increased penetration of renewable resourcesMost Nahida Akter, A. B. M. Nasiruzzaman, M. Apel Mahmud, Hemanshu Roy Pota. 494-497 [doi]
• Pinning impulsive synchronization in coupled delayed directed dynamical networksChunnan Lin, Quanjun Wu, Lan Xiang, Jin Zhou. 498-501 [doi]
• Injection-Locking Frequency Divider based dual-modulus prescalers with extended locking rangeJing Jin, Bukun Pan, Xiaoming Liu, Jianjun Zhou. 502-505 [doi]
• A 1.2 - 6.4 GHz clock generator with a low-power DCO and programmable multiplier in 40-nm CMOSTero Tikka, Kari Stadius, Jussi Ryynänen, Martti Voutilainen. 506-509 [doi]
• Multi-objective directional sensor placement for wireless sensor networksChi-Tsun Cheng, Henry Leung. 510-513 [doi]
• A 2µA temperature compensated mems-based real time clock with ±4 ppm timekeeping accuracyJakub Gronicz, Mika Pulkkinen, Mikail Yücetas, Kari Halonen. 514-517 [doi]
• Details preservation inspired blind quality metric of tone mapping methodsKe Gu, Guangtao Zhai, Min Liu, Xiaokang Yang, Wenjun Zhang 0001. 518-521 [doi]
• A new visual object tracking algorithm using Bayesian Kalman filterShuai Zhang, Shing-Chow Chan, Bin Liao, Kai Man Tsui. 522-525 [doi]
• A new method of detecting fingertip touch for the projector-camera HCI systemXilei Cai, Xiang Xie, Guolin Li, Wei Song, Yi Zheng, Zhihua Wang. 526-529 [doi]
• No reference image quality metric via distortion identification and multi-channel label transferQingbo Wu, Hongliang Li, King N. Ngan, Bing Zeng, Moncef Gabbouj. 530-533 [doi]
• Saliency detection based on adaptive DoG and distance transformHong-Yun Gao, Kin-Man Lam. 534-537 [doi]
• Content adaptive depth map resampling scheme in multiview video plus depthMaryam Homayouni, Alireza Aminlou, Payman Aflaki, Moncef Gabbouj. 538-541 [doi]
• A resolution-adaptive interpolation filter for video codecHao Lv, Ronggang Wang, Yuan Li, Chuang Zhu, Huizhu Jia, Xiaodong Xie, Wen Gao. 542-545 [doi]
• An AVS- and object- based approach to scalable coding of plenoptic videosX. Z. Yao, Qing Wu, Shing-Chow Chan. 546-549 [doi]
• Hybrid transform for HEVC-based lossless codingFangdong Chen, Jinlei Zhang, Houqiang Li. 550-553 [doi]
• A practical FEC code rate decision scheme based on joint source-channel distortion modelTae-jun Jung, Kwang-deok Seo, Yo-Won Jeong, Chang-Ki Kim. 554-557 [doi]
• A 28nm programmable and low power ultra-HD video codec engineHetul Sanghvi, Mihir N. Mody, Niraj Nandan, Mahesh Mehendale, Subrangshu Das, Dipan Kumar Mandal, Pavan Shastry. 558-561 [doi]
• Joint multi-CDN and LT-coding for video transport over HTTPKai Tang, Chao Zhou, Xinggong Zhang, Zongming Guo. 562-565 [doi]
• Social relation-aware SVC-based video streaming system over P2P networkDonghyeok Ho, Kyuhwi Choi, Hwangjun Song. 566-569 [doi]
• Banknote reconstruction from fragments using quadratic programming and SIFT pointsPo-Hung Wu, Jian-Jiun Ding, Jing-Ming Guo, Pei-Jen Kang, Chang En Pu. 570-573 [doi]
• A novel view synthesis algorithm based on depth and texture consistencyHung-Ming Wang, An-Ti Chiang, Kuo-Hao Lee, Jar-Ferr Yang. 574-577 [doi]
• Run-time SoC memory subsystem mapping of heterogeneous clientsAlexsandro Cristovão Bonatto, Altamiro Amadeu Susin. 578-581 [doi]
• Design and implementation of CAN data compression algorithmYujing Wu, Jin-Gyun Chung, Myung Hoon Sunwoo. 582-585 [doi]
• A CMOS wide-range temperature sensor with process compensation and second-order calibration for Battery Management SystemsChua-Chin Wang, Wen-Je Lu, Tzu-Chao Wu, Chun-Ying Juan. 586-589 [doi]
• Low-power wiring method in CMOS logics circuits by segmentation coding and pseudo majority votingKatsuhiko Ueda, Zuiko Rikuhashi, Kentaro Hayashi, Hiroomi Hikawa. 590-593 [doi]
• Thermal conduction path analysis in 3-D ICsBoris Vaisband, Ioannis Savidis, Eby G. Friedman. 594-597 [doi]
• Two phase clocking subthreshold adiabatic logicKazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine. 598-601 [doi]
• A new fault injection method for evaluation of combining SEU and SET effects on circuit reliabilityKejun Wu, Hoda Pahlevanzadeh, Peng Liu 0016, Qiaoyan Yu. 602-605 [doi]
• Power conversion schemes in nanometer CMOS mixed-signal SoCsWei Fu, Ayman A. Fayed. 606-609 [doi]
• On the design of RF-DACs for random acquisition based reconfigurable receiversWaleed Khalil, Jamin J. McCue, Brian Dupaix, Wagdy Gaber, Sami Smaili, Yehia Massoud. 610-613 [doi]
• Wide-band efficiency-enhanced CMOS rectifierHongcheng Xu, Matthias Lorenz, Ulrich Bihr, Jens Anders, Maurits Ortmanns. 614-617 [doi]
• Voltage equalization of lithium iron phosphate batteries cooperating with supercapacitorsFu-Sheng Pai, Shyh-Jier Huang, Chen-Wei Ku, Ying-Rong Chen, Bo-Ge Huang, Yu-Chie Lin. 618-621 [doi]
• Battery state-of-charge estimation prototype using EMF voltage predictionChristoph Unterrieder, Michael Lunglmayr, Stefano Marsili, Mario Huemer. 622-625 [doi]
• A data driven circuit model for rechargeable batteriesMassimo Panella, Andrea Proietti. 626-629 [doi]
• Design considerations for a CMOS Lab-on-Chip microheater array to facilitate the in vitro thermal stimulation of neuronsFerran Reverter, Themistoklis Prodromakis, Yan Liu, Pantelis Georgiou, Konstantin Nikolic, Timothy G. Constandinou. 630-633 [doi]
• High resolution capacitance sensor array for real-time monitoring of cell viabilityEmily Naviasky, Timir Datta-Chaudhuri, Pamela Abshire. 634-637 [doi]
• Development of an integrated CMOS-microfluidic instrumentation array for high throughput membrane protein studiesLin Li, Andrew J. Mason. 638-641 [doi]
• A lab-on-chip approach for monitoring the electrochemical activity of biorealistic cell culturesTatiana Trantidou, Tatiana Tariq, K. Pinto, Christofer Toumazou, Cesare M. Terracciano, Themistoklis Prodromakis. 642-645 [doi]
• Reconfigurable Lab-on-Chip platform for algae cell manipulationMohamed Amine Miled, Mohamad Sawan. 646-649 [doi]
• The PennBMBI: A general purpose wireless Brain-Machine-Brain Interface system for unrestrained animalsXilin Liu, Basheer Subei, Milin Zhang, Andrew G. Richardson, Timothy H. Lucas, Jan Van der Spiegel. 650-653 [doi]
• A reliable brain computer interface implemented on an FPGA for a mobile dialing systemChih-Wei Feng, Ting-Kuei Hu, Jui-Chung Chang, Wai-Chi Fang. 654-657 [doi]
• High-throughput hardware for real-time spike overlap decomposition in multi-electrode neuronal recording systemsJelena Dragas, David Jackel, Felix Franke, Andreas Hierlemann. 658-661 [doi]
• An HMM-based eye movement detection system using EEG brain-computer interfaceChi-Hsuan Hsieh, Hao-Ping Chu, Yuan-Hao Huang. 662-665 [doi]
• A SAR based calibration scheme for ISFET sensing arraysYuanqi Hu, Jiandong Li, Pantelis Georgiou. 666-669 [doi]
• Sub-Hz self-powered sensing based on mechanical-buckling driven hot-electron injectionNizar Lajnef, Rigoberto Burgueno, Wassim Borchani, Shantanu Chakrabartty. 670-673 [doi]
• All-digital ADC/TDC using TAD architecture for highly-durable time-measurement ASICTakamoto Watanabe, Hirofumi Isomura. 674-677 [doi]
• A current-mode CMOS integrated microsystem for current spinning magnetic hall sensorsHadi Heidari, Edoardo Bonizzoni, Umberto Gatti, Franco Maloberti. 678-681 [doi]
• A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation techniqueYing-Wei Chou, Meng-Wei Chien, Shin-Chieh Chen, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang, Huang Tian Hui. 680-2683 [doi]
• A 0.4 V driving multi-touch capacitive sensor with the driving signal frequency set to (n+0.5) times the inverse of the LCD VCOM noise periodJae-Seung Lee, Dong-Hee Yeo, Sang-Soo Lee, Hye-Jung Kwon, Jae-Yoon Sim, Byungsub Kim, Hong June Park. 682-685 [doi]
• Real-time, high-speed video decompression using a frame- and event-based DAVIS sensorChristian Brandli, Lorenz Müller, Tobi Delbrück. 686-689 [doi]
• Design and implementation of an RF CMOS differential LNA for 403MHz applicationsSherif Ahmed Saleh Mohamed, Yiannos Manoli. 690-693 [doi]
• A high isolation linear folded mixer for WiFi applicationsDarshak Bhatt, Jayanta Mukherjee, Jean-Michel Redoute. 694-697 [doi]
• Experimental evaluation of wide range injection locking in a CMOS RC oscillatorEduardo Ortigueira, Luís Bica Oliveira, Jorge R. Fernandes, Manuel Medeiros Silva. 698-701 [doi]
• A UHF RFID reader transmitter with digital CMOS power amplifierYing Guo, Long Chen, Tao Xia, Le Ye, Xing Zhang, Huailin Liao. 702-705 [doi]
• A low-power fully-integrated SP10T-RF-switch-ICYusuke Wachi, Takashi Kawamoto, Akira Maeki, Toru Masuda. 706-709 [doi]
• An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulatorsXiao Liang Tan, Pak Kwong Chan, U. Dasgupta. 710-713 [doi]
• th order, 700-1100 MHz, 3.6 Gb/s RF bandpass ΣΔ ADC with two-tone SFDR 67.2 dB in 65nm CMOSLiang Zou, Udo Karthaus, Deepti Sukumaran, Nasser Mehrtash, Horst Wagner. 714-717 [doi]
• Design considerations of bandpass CT ΣΔ modulators for software-defined-radio receiversGerardo Molina Salgado, Gordana Jovanovic-Dolecek, Alonso Morgado, Jose M. de la Rosa. 718-721 [doi]
• Limit cycle counting based smart background calibration of continuous time sigma delta ADCsKetan J. Pol, Hans Hegt, Arthur H. M. van Roermund, Sotir Ouzounov. 722-725 [doi]
• Efficient estimation of noise and signal transfer functions of a continuous-time ΣΔ modulatorShanthi Pavan. 726-729 [doi]
• Low-latency MAP demapper architecture for coded modulation with iterative decodingYouZhe Fan, Chi-Ying Tsui. 730-733 [doi]
• A 2.4pJ/bit ASK demodulator with 100% modulation rate for 13.56MHz NFC/RFID applicationsGuangjie Cai, Alan Pun, David Kwong, K.-C. Wang. 734-737 [doi]
• Timing synchronization in super-regenerative receivers with a single quench cycle per symbolJinesh P. Nair, Kiran Bynam, Young-Jun Hong, Joonseong Kang, Pradeep Dwarakanath, Manoj Choudhary. 738-741 [doi]
• Digital spur calibration of multi-modulus fractional frequency LO divider utilizing most correlated comparison algorithmJing Jin, Bukun Pan, Xiaoming Liu, Jianjun Zhou. 742-745 [doi]
• A high-speed PRBS generator using flip-flops employing feedback for distributed equalizationMahendra Sakare, Shalabh Gupta. 746-749 [doi]
• Automatic age recommendation system for children's video contentJoseph Santarcangelo, Xiao-Ping Zhang. 750-753 [doi]
• A multi-modal approach to emotion recognition using undirected topic modelsMohit Shah, Chaitali Chakrabarti, Andreas Spanias. 754-757 [doi]
• An 1.92mW Feature Reuse Engine based on inter-frame similarity for low-power object recognition in video framesDongjoo Shin, Injoon Hong, Hoi-Jun Yoo. 758-761 [doi]
• A single-chip 600-fps real-time action recognition system employing a hardware friendly algorithmZuoxun Hou, Hongbo Zhu, Nanning Zheng, Tadashi Shibata. 762-765 [doi]
• Global image representation using Locality-constrained Linear Coding for large-scale image retrievalYu-Hsing Wu, Wei-Lin Ku, Wen-Hsiao Peng, Hung-Chun Chou. 766-769 [doi]
• Radiation tolerant SPI-programmable delay line for high energy physics experimentsJ. Mauricio, David Gascon Fora, Eduardo Picatoste, Eugeni Grauges, L. Garrido, Xavier Vilasis-Cardona, F. Machefert, O. Duarte, J. Lefrancois. 770-773 [doi]
• A Randomized Modulation scheme for filterless digital Class D audio amplifiersVictor Adrian, Cui Keer, Bah-Hwee Gwee, Joseph Sylvester Chang. 774-777 [doi]
• A low-overhead dynamic watermarking scheme on scan design for easy authenticationAijiao Cui, Wei Liang, Gang Qu. 778-781 [doi]
• Reducing the analog-digital productivity gap using time-mode signal processingGordon W. Roberts. 782-785 [doi]
• A pixel-based depth estimation algorithm and its hardware implementation for 4-D light field dataChe-Wei Chang, Man-Rong Chen, Po-Hsiang Hsu, Yi-Chang Lu. 786-789 [doi]
• Reducing pin count on cross-referencing Digital Microfluidic BiochipHo Chuen Jackson Yeung, Evangeline F. Y. Young, C.-S. Choy. 790-793 [doi]
• Analytic modeling of memristor variability for robust memristor systems designsSami Smaili, Yehia Massoud. 794-797 [doi]
• Protecting DSP circuits through obfuscationYingjie Lao, Keshab K. Parhi. 798-801 [doi]
• Optimal techniques for assigning inter-tier signals to 3D-vias with path control in a 3DICNeela Gopi, Jeffrey Draper. 802-805 [doi]
• Multilayer graphene nanoribbon floating gate transistor for flash memoryNahid M. Hossain, Masud H. Chowdhury. 806-809 [doi]
• Secured Dual Mode Logic (DML) as a countermeasure against Differential Power AnalysisMoshe Avital, Alexander Fish. 810-813 [doi]
• An efficient countermeasure against power attacks for ECC over GF(p)Jheng-Hao Ye, Szu-Han Huang, Ming-Der Shieh. 814-817 [doi]
• m)Kai Liao, Xiaoxin Cui, Nan Liao, Tian Wang, Xiao Zhang, Ying Huang, Dunshan Yu. 818-821 [doi]
• m)Kung Chi Cinnati Loi, Sen An, Seok-Bum Ko. 822-825 [doi]
• 4) using secure charge-sharing symmetric adiabatic logicCâncio Monteiro, Yasuhiro Takahashi, Toshikazu Sekine. 826-829 [doi]
• Emerging resistive switching memory technologies: Overview and current statusMatthew J. Marinella. 830-833 [doi]
• Bio-inspired computing with resistive memories - models, architectures and applicationsQing Wu, Beiye Liu, Yiran Chen, Hai Li, Qiuwen Chen, Qinru Qiu. 834-837 [doi]
• Resistive switching in organic memory devices for flexible applicationsRu Huang, YiMao Cai, Yefan Liu, Wenliang Bai, Yongbian Kuang, Yangyuan Wang. 838-841 [doi]
• Quantitative method for estimating characteristics of conductive filament in ReRAMZhiqiang Wei, Ryutaro Yasuhara, Koji Katayama, Takumi Mikawa, Takeki Ninomiya, Shunsaku Muraoka. 842-845 [doi]
• Stack engineering for ReRAM devices performance improvementHuaqiang Wu, Xinyi Li, Yue Bai, Ye Zhang, Minghao Wu, Zhiping Yu, He Qian. 846-849 [doi]
• VLSI implementation of a conductance-based multi-synapse using switched-capacitor circuitsMarko Noack, Markus Krause, Christian Mayr, Johannes Partzsch, René Schüffny. 850-853 [doi]
• A hybrid analog/digital Spike-Timing Dependent Plasticity learning circuit for neuromorphic VLSI multi-neuron architecturesHesham Mostafa, Federico Corradi, Fabio Stefanini, Giacomo Indiveri. 854-857 [doi]
• Neuromorphic circuits for Short-Term Plasticity with recovery controlHarshawardhan Ramachandran, Stefan Weber, Syed Ahmed Aamir, Elisabetta Chicca. 858-861 [doi]
• A compact reconfigurable mixed-signal implementation of synaptic plasticity in spiking neuronsRunchun Wang, Tara Julia Hamilton, Jonathan Tapson, André van Schaik. 862-865 [doi]
• Optical wireless receiver for data delivery to retinal implantIkramullah Shah, Denis Guangyin Chen, Moaaz Ahmed, Amine Bermak. 866-869 [doi]
• Performance evaluation of a low power optical wireless link for biomedical data transferTianyi Liu, Ulrich Bihr, Jens Anders, Maurits Ortmanns. 870-873 [doi]
• A 0.6 V, 1.66mW energy harvester and audio driver for tympanic membrane transducer with wirelessly optical signal and power transferJhong-Ting Jian, Yu-Lin Song, Chia-Fone Lee, Yuan-Fang Chou, Wei-Zen Chen. 874-877 [doi]
• Receiver design for CMUT-based super-resolution ultrasound imagingParisa Behnamfar, Reza Molavi, Shahriar Mirabbasi. 878-881 [doi]
• An ultra low power pH-monitoring IC with a duty-cycling wireless FM-transmitterYusuke Shiino, Hiroyuki Ito, Taku Fujiwara, Noboru Ishihara, Hisashi Yamanouchi, Hiroki Tanabe, Satoshi Nomura, Toshifumi Konishi, Katsuyuki Machida, Kazuya Masu. 882-885 [doi]
• Texture classification using joint statistical representation in space-frequency domain with local quantized patternsTiecheng Song, Hongliang Li, Bing Zeng, Moncef Gabbouj. 886-889 [doi]
• Incremental GMMSD2 with applications to feature extractionNing Zheng, Lin Qi, Ling Guan. 890-893 [doi]
• Visual attention data for image quality assessment databasesXiongkuo Min, Guangtao Zhai, Zhongpai Gao, Ke Gu. 894-897 [doi]
• Reduced-reference image quality assessment with local binary structural patternJinjian Wu, Weisi Lin, Guangming Shi, Long Xu. 898-901 [doi]
• A novel decoder architecture for error resilient JPEG2000 applications based on MQ arithmeticSimone Zezza, Guido Masera, Saeid Nooshabadi. 902-905 [doi]
• Fast-transient-response high-PSR low-dropout regulator based on ultra-fast error amplifier and unity-gain buffer for portable applicationsYonggen Liu, Chenchang Zhan, Wing-Hung Ki. 906-909 [doi]
• Precision CMOS current reference with process and temperature compensationCristina Azcona, Belén Calvo, Santiago Celma, Nicolas Medrano, Maria Teresa Sanz. 910-913 [doi]
• A curvature-compensation technique based on the difference of Si and SiGe junction voltages for bandgap voltage circuitsYi Huang, Li Zhu, Chun Cheung, Laleh Najafizadeh. 914-917 [doi]
• A low voltage auto-reconfigured power-on-reset/bandgap reference circuitEdward K. F. Lee. 918-921 [doi]
• A low temperature coefficient voltage reference utilizing BiCMOS compensation techniqueYi Huang, Li Zhu, Chun Cheung, Laleh Najafizadeh. 922-925 [doi]
• A purely-VCO-based single-loop high-order continuous-time ΣΔ ADCYeonam Yoon, Kyoungtae Lee, Peijun Wang, Nan Sun. 926-929 [doi]
• A time-domain based multi-bit ADC for application in Delta-Sigma modulatorsChongjun Ding, Yiannos Manoli, Matthias Keller. 930-933 [doi]
• A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensationYi Zhang, Chia-Hung Chen, Tao He, Xin Meng, Gabor C. Temes. 934-937 [doi]
• Improved offline calibration for DAC mismatch in low OSR ΣΔ ADCs with distributed feedbackMaarten De Bock, Amir Babaie-Fishani, Pieter Rombouts. 938-941 [doi]
• A novel timing-error based approach for high speed highly linear Mixing-DAC architecturesElbert Bechthum, Georgi I. Radulov, Joost Briaire, Govert Geelen, Arthur H. M. van Roermund. 942-945 [doi]
• A pseudo fixed switching frequency 2kHz/A in optimum on-time control buck converter with predicting correction technique for EMI solutionWei-Chung Chen, Kuei-Liang Lin, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang. 946-949 [doi]
• Current-mode adaptively hysteretic control for buck converters with fast transient response and improved output regulationKuan-I. Wu, Shuo-Hong Hung, Shang-Yu Shieh, Bor-Tsang Hwang, Szu-Yao Hung, Charlie Chung-Ping Chen. 950-953 [doi]
• A Fixed-frequency hysteretic controlled buck DC-DC converter with improved load regulationZhuochao Sun, Liter Siek, Ravinder Pal Singh, Minkyu Je. 954-957 [doi]
• An enhanced pulse width modulator with adaptive duty cycle and frequency controlMahmood J. Azhar, Selçuk Köse. 958-961 [doi]
• A circuit-oriented geometrical approach in predicting subharmonic oscillation of dc-dc converters with voltage-mode controlLin Cheng, Wing-Hung Ki. 962-965 [doi]
• Efficient design of sparse FIR filters with optimized filter lengthAimin Jiang, Hon Keung Kwan, Yibin Tang, Yanping Zhu. 966-969 [doi]
• A polynomial-time algorithm for the design of multiplierless linear-phase FIR filters with low hardware costWen Bin Ye, Ya Jun Yu. 970-973 [doi]
• All-pass based robust low complexity structures for implementing recursive digital filtersGang Li, Yong Ching Lim, Chaogeng Huang. 974-977 [doi]
• Closed form variable fractional delay using FFT with transition band trade-offSoo-Chang Pei, Yun-Chiu Lai. 978-981 [doi]
• Jointly optimal error feedforward, high-order error feedback and realization for roundoff noise minimization in IIR digital filtersTakao Hinamoto, Akimitsu Doi, Wu-Sheng Lu. 982-985 [doi]
• A low-power parasitic-insensitive switched-capacitor integrator for Delta-Sigma ADCsXin Meng, Tao Wang, Gabor C. Temes. 986-989 [doi]
• A 65 nm single stage 28 fJ/cycle 0.12 to 1.2V level-shifterBabak Mohammadi, Joachim Neves Rodrigues. 990-993 [doi]
• Post-floorplanning power optimization for MSV-driven application specific NoC designKan Wang, Sheqin Dong. 994-997 [doi]
• Design of multi-stage latency adders using detection and sequence-dependence between successive calculationsXinghua Yang, Fei Qiao, Chang Liu, Qi Wei, Huazhong Yang. 998-1001 [doi]
• Replica bias scheme for efficient power utilization in high-frequency CMOS digital circuitsSaravanan Kathiah, Sankaran Aniruddhan. 1002-1005 [doi]
• An IEEE 802.15.3c/802.11ad compliant SC/OFDM dual-mode baseband receiver for 60 GHz BandWei-Chang Liu, Fu-Chun Yeh, Chia-Yi Wu, Ting-Chen Wei, Ya-Shiue Huang, Shen-Jui Huang, Ching-Da Chan, Shyh-Jye Jou, Sau-Gee Chen. 1006-1009 [doi]
• Decoupling network optimization in high speed systems by mixed-integer programmingJai Narayan Tripathi, Ashutosh Mahajan, Jayanta Mukherjee, Raj Kumar Nagpal, Rakesh Malik, Nitin Gupta. 1010-1013 [doi]
• Adaptive multiple switching strategy toward an ideal NoCDebora Matos, Márcio Eduardo Kreutz, Cezar Reinbrecht, Luigi Carro, Altamiro Amadeu Susin. 1014-1017 [doi]
• Efficient VLSI architectures for matrix inversion in soft-input soft-output MMSE MIMO detectorsDominik Auras, Rainer Leupers, Gerd Ascheid. 1018-1021 [doi]
• Efficient list decoder architecture for polar codesJun Lin, Zhiyuan Yan. 1022-1025 [doi]
• Impulsive consensus for second-order multi-agent systems with a reference velocity and input delaysLiyun Zhao, Quanjun Wu, Jin Zhou. 1026-1029 [doi]
• Analytical description of multilevel carrier-based PWM of arbitrary bounded input signalsarald Enzinger, hristian Vogel. 1030-1033 [doi]
• Low-rate identification of memory polynomialsNikolaus Hammler, Yonina C. Eldar, Boris Murmann. 1034-1037 [doi]
• An ACO-based off-line path planner for nonholonomic mobile robotsNuwan Ganganath, Chi-Tsun Cheng, Chi Kong Tse. 1038-1041 [doi]
• Dynamical behaviors of interconnected converters in intermediate bus architectureKuntal Mandal, Abdullah Abusorrah, Mohammed M. Al-Hindawi, Yusuf Al-Turki, Damian Giaouris, Soumitro Banerjee. 1042-1045 [doi]
• Hybrid solid-state storage system with storage class memory and NAND flash memory for big-data applicationKen Takeuchi. 1046-1049 [doi]
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• ReRAM-based synaptic device for neuromorphic computingJun-Woo Jang, Sangsu Park, Yoon-Ha Jeong, Hyunsang Hwang. 1054-1057 [doi]
• Orientation classification by a winner-take-all network with oxide RRAM based synaptic devicesShimeng Yu. 1058-1061 [doi]
• Design considerations of synaptic device for neuromorphic computingShimeng Yu, Duygu Kuzum, H.-S. Philip Wong. 1062-1065 [doi]
• Building memristive neurons and synapsesMartin Ziegler, Mirko Hansen, Marina Ignatov, Hermann Kohlstedt. 1066-1069 [doi]
• Dynamic computing random access memory: A brain-inspired computing paradigm with memelementsMassimiliano Di Ventra, Fabio L. Traversa, Fabrizio Bonani, Yuriy V. Pershin. 1070-1073 [doi]
• Spin-transfer torque magnetic memory as a stochastic memristive synapseA. F. Vincent, J. Larroque, W. S. Zhao, N. Ben Romdhane, Olivier Bichler, Christian Gamrat, J.-O. Klein, S. Galdin-Retailleau, Damien Querlioz. 1074-1077 [doi]
• Pattern recognition with memristor networksPatrick Sheridan, Wen Ma, Wei Lu. 1078-1081 [doi]
• A low-power 2.4-GHz receiver for wireless implantable neural stimulatorsSeyed Abdollah Mirbozorgi, Hadi Bahrami, Leslie Ann Rusch, Benoit Gosselin. 1082-1085 [doi]
• A low-power reconfigurable CMOS power amplifier for wireless sensor network applicationsNan Zheng, Jaeyoung Kim, Pinaki Mazumder. 1086-1089 [doi]
• An integrated coil driver with discrete control and power efficient ASK modulation for transcutaneous power transmissionEdward K. F. Lee. 1090-1093 [doi]
• A novel quasi-static channel enhancing technique for body channel communicationBo Zhao, Huazhong Yang, Yong Lian. 1094-1097 [doi]
• A novel fully integrated low-power CMOS BPSK demodulator for medical implantable receiversSherif Ahmed Saleh Mohamed, Yiannos Manoli. 1098-1101 [doi]
• Non-local extension of total variation regularization for image restorationHangfan Liu, Ruiqin Xiong, Siwei Ma, Xiaopeng Fan, Wen Gao. 1102-1105 [doi]
• Segmentation-based scale-invariant nonlocal means super resolutionSaboya Yang, Jiaying Liu, Qiaochu Li, Zongming Guo. 1106-1109 [doi]
• Simplified depth intra mode selection for 3D video compressionZhouye Gu, Jianhua Zheng, Nam Ling, Philipp Zhang. 1110-1113 [doi]
• Transform domain energy modeling of natural images for wireless SoftCast optimizationZhihai Song, Ruiqin Xiong, Xiaopeng Fan, Siwei Ma, Wen Gao. 1114-1117 [doi]
• Error resilience for key frames in distributed video coding with rate-distortion optimized mode decisionHsin-Fang Wu, Chia-han Lee, V. Srinivasa Somayazulu, Yen-Kuang Chen, Shao-Yi Chien. 1118-1121 [doi]
• Evaluation of Read- and Write-Assist circuits for GeOI FinFET 6T SRAM cellsVita Pi-Ho Hu, Ming-Long Fan, Pin Su, Ching-Te Chuang. 1122-1125 [doi]
• A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS processChua-Chin Wang, Chiang-Hsiang Liao, Sih-Yu Chen. 1126-1129 [doi]
• Investigation and optimization of monolithic 3D logic circuits and SRAM cells considering interlayer couplingMing-Long Fan, Vita Pi-Ho Hu, Yin-Nien Chen, Pin Su, Ching-Te Chuang. 1130-1133 [doi]
• A fast-locking all-digital phase locked loop in 90nm CMOS for Gigascale systemsYi-Wei Chen, Hao-Chiao Hong. 1134-1137 [doi]
• An ABCD parameter based modeling and analysis of crosstalk induced effects in Multilayer Graphene Nano Ribbon interconnectsManodipan Sahoo, Hafizur Rahaman. 1138-1142 [doi]
• Split ADC digital background calibration for high speed SHA-less pipeline ADCsHussein Adel, Marc Sabut, Roger Petigny, Marie-Minerve Louërat. 1143-1146 [doi]
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• A random DEM technique with minimal element transition rate for high-speed DACsPeijun Wang, Nan Sun. 1155-1158 [doi]
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• Application of wolf group hierarchy optimization algorithm to fault section estimation in power systemsShyh-Jier Huang, Xian-Zong Liu, Wei-Fu Su, Shih-Chieh Tsai, Chao-Ming Liao. 1163-1166 [doi]
• A wide bandwidth, on-line impedance measurement method for power systems, based On PLC techniquesShucheng Zhu, Cornelis Jan Kikkert, Nesimi Ertugrul. 1167-1170 [doi]
• Dynamic building model for demand responseMohammed Muthalib, Chika Nwankpa. 1171-1174 [doi]
• Influence of the conductor design on the temperature field in a high voltage gas insulated switchgearRebzani Nesrine, Marty Philippe, Clavel Edith. 1175-1178 [doi]
• RMS voltage control with harmonic compensation for parallel-connected inverters feeding non-linear loadsAndoni Urtasun, Pablo Sanchis, Luis Marroyo. 1179-1182 [doi]
• Design of programmable FIR filters using Canonical Double Based Number RepresentationJiajia Chen, Chip-Hong Chang. 1183-1186 [doi]
• A variable step-size zero attracting proportionate normalized least mean square algorithmRajib Lochan Das, Mrityunjoy Chakraborty. 1187-1190 [doi]
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• A sequential weighted least squares procedure for design of IIR filters and two-channel IIR filter banksYue Chen, Dongye Zhang, Zhiping Lin, Xiaoping Lai. 1195-1198 [doi]
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• Current-mode clock distributionRiadul Islam, Matthew R. Guthaus. 1203-1206 [doi]
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• Simulations on 130 nm technology 6T SRAM cell for Near-Threshold operationMika Kutila, Ari Paasio, Teijo Lehtonen. 1211-1214 [doi]
• A power-efficient pulse-based in-situ timing error predictor for PVT-variation sensitive circuitsLih-Yih Chiou, Chi-Ray Huang, Ming-Hung Wu. 1215-1218 [doi]
• A compact on-chip IR-drop measurement system in 28 nm CMOS technologySebastian Dietel, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stefan Hänzsche, Stephan Henker, René Schüffny, Tim Brauninger, Ulrich Fiedler. 1219-1222 [doi]
• A unique and robust single slice FPGA identification generatorChongyan Gu, Julian P. Murphy, Máire O'Neill. 1223-1226 [doi]
• Generation of fixed-point VHDL MIMO-OFDM QR pre-processor for Spherical DetectorsTodd E. Schmuland, Mohsin M. Jamali. 1227-1230 [doi]
• Map-reduce inspired loop parallelization on CGRAShengjia Shao, Shouyi Yin, Leibo Liu, Shaojun Wei. 1231-1234 [doi]
• Simulation-based memory dependence checker for CGRA-mapped code verificationHeejun Shim, Soojung Ryu. 1235-1238 [doi]
• Remote dynamically reconfigurable platform using NetFPGATze Hon Tan, Chia Yee Ooi, Yuan Wen Hau, Nasir Shaikh-Husin, Muhammad N. Marsono. 1239-1242 [doi]
• Sigma - Delta inspired control technique for the improvement of MEMS reliabilityPanagiotis Giounanlis, Elena Blokhina, Orla Feely, Sergi Gorreta, Joan Pons-Nin, Manuel Domínguez. 1243-1246 [doi]
• Modelling and analysis of vibration energy harvesters with charge pump conditioning circuitsEoghan O'Riordan, Elena Blokhina, Orla Feely, Dimitri Galayko. 1247-1250 [doi]
• On the functionality of RTD MOBILE circuits - A geometric approachMichael Popp, Tina Thiessen, Christoph Zorn, Wolfgang Mathis. 1251-1254 [doi]
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• Beyond series and parallel: Coupling as a third relation in memristive systemsWeiran Cai, Ronald Tetzlaff. 1259-1262 [doi]
• How is that complex network complex?Michael Small, Kevin Judd, Linjun Zhang. 1263-1266 [doi]
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• Consensus of edge dynamics on complex networksXiaofan Wang, Xiaoling Wang. 1271-1274 [doi]
• Examining overlapping community structures within grain property networksDavid M. Walker, Antoinette Tordesillas. 1275-1278 [doi]
• Design of projection matrix for compressive sensing by nonsmooth optimizationWu-Sheng Lu, Takao Hinamoto. 1279-1282 [doi]
• Implementation details of mid-level vision on the Embedded Vision Engine (EVE)Sanmati Kamath, Shashank Dabral, Jagadeesh Sankaran, Brian Valentine, Branislav Kisacanin. 1283-1287 [doi]
• Contourlet domain image modeling by using the alpha-stable family of distributionsHamidreza Sadreazami, M. Omair Ahmad, M. N. S. Swamy. 1288-1291 [doi]
• Fast and accurate 2-D DOA estimation via sparse L-shaped arrayJian-Feng Gu, Wei-Ping Zhu, M. N. S. Swamy, S. C. Chan. 1292-1295 [doi]
• Implementation of a Stereo Matching algorithm onto a Manycore Embedded SystemAlexandre Mercat, Jean-François Nezan, Daniel Menard, Jinglin Zhang. 1296-1299 [doi]
• FPGA based system for the generation of noise with programmable power spectrumEttore Napoli, Mauro D'Arco, Pasquale Di Cosmo, Mariangela Genovese, Antonio G. M. Strollo. 1300-1303 [doi]
• A blind frequency response mismatch correction algorithm for 4-channel Time-Interleaved ADCSimran Singh, Michael Epp, Georg Vallant, Mikko Valkama, Lauri Anttila. 1304-1307 [doi]
• High-speed multiplier block design based on bit-level critical path optimizationXin Lou, Ya Jun Yu, Pramod Kumar Meher. 1308-1311 [doi]
• A real-time detection algorithm for freezing of gait in Parkinson's diseaseYi-Fan Chang, Jian-Jiun Ding, Hao Hu, Wen-Chieh Yang, Kwan-Hwa Lin, Po-Hung Wu. 1312-1315 [doi]
• Perturbation-based digital background calibration technique for pipelined ADCsYung-Hui Chung. 1316-1319 [doi]
• A passive resonant clocking network for distribution of a 2.5-GHz clock in a flash ADCMike Bichan, Dustin Dunwell, Qiwei Wang, Anthony Chan Carusone. 1320-1323 [doi]
• nd-order noise shapingPing Lu, Pietro Andreani. 1324-1327 [doi]
• A 20-MHz BW 75-dB SFDR shifted-averaging VCO-based ΔΣ modulatorYu-Hsuan Kang, Chin-Yu Lin, Tai-Cheng Lee. 1328-1331 [doi]
• A 1-GS/s 11.5-ENOB time-interleaved ADC with fully digital background calibrationYohei Nakamura, Takashi Oshima. 1332-1335 [doi]
• Algorithm and implementation of digital calibration of fast converging Radix-3 SAR ADCManzur Rahman, Long Chen, Nan Sun. 1336-1339 [doi]
• A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applicationsJoão L. A. de Melo, Fábio Querido, Nuno F. Paulino, João Goes. 1340-1343 [doi]
• th order MASH switched-capacitor ΣΔ modulator using ultra incomplete settlingBlazej Nowacki, Nuno Paulino, Joao Goes. 1344-1347 [doi]
• Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulatorsDa Feng, Franco Maloberti, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 1348-1351 [doi]
• A capacitor constructed bypass window switching scheme for energy-efficient SAR ADCYao-Ping Liu, Chao Yuan, Yvonne Lam Ying Hung. 1352-1355 [doi]
• Rail-to-rail CMOS complementary input stage with alternating active differential pairsMaría de Rodanas Valero Bernal, Alejandro Roman-Loera, Jaime Ramírez-Angulo, Nicolas Medrano, Santiago Celma. 1356-1359 [doi]
• Analysis and design of a 1.3-mW current-reuse RF front-end for the MICS bandHugo Cruz, Hong-Yi Huang, Shuenn-Yuh Lee, Ching-Hsing Luo. 1360-1363 [doi]
• CMOS op-amps for biomedical applicationsJose M. Algueta Miguel, Antonio J. López-Martín, Carlos Aristoteles De la Cruz-Blas, Jaime Ramirez-Angulo, Ramón González Carvajal. 1364-1367 [doi]
• Multi-band RF time delay element based on frequency translationGaurav Agrawal, Sankaran Aniruddhan, Radha Krishna Ganti. 1368-1371 [doi]
• Quadrature relaxation oscillator with FoM of -165 dBc/HzEduardo Ortigueira, Taimur Gibran Rabuske, Luis Bica Oliveira, Jorge R. Fernandes, Manuel Silva. 1372-1375 [doi]
• A 0.8V 8GHz low power sub-harmonic self-oscillating mixerMing-Jhe Zeng, Ren-Yuan Huang, Ro-Min Weng. 1376-1379 [doi]
• A high voltage zero-static current voltage scaling ADC interface circuit for micro-stimulatorPaul Jung-Ho Lee, Denis Guangyin Chen, Amine Bermak, Man Kay Law. 1380-1383 [doi]
• Vascular compliance probe with integrated ECG for image-free evaluation of arterial stiffnessMalaykumar Shah, Jayaraj Joseph, Mohanasankar Sivaprakasam. 1384-1387 [doi]
• An analogue instantaneous median frequency tracker for EMG fatigue monitoringErmis Koutsos, Pantelis Georgiou. 1388-1391 [doi]
• A highly integrated biomedical multiprocessor SoC design for a wireless bedside monitoring systemKuen-Chih Lin, Jui-Chieh Liao, Wai-Chi Fang. 1392-1395 [doi]
• Optimization of nonlinear energy operator based spike detection circuit for high density neural recordingsYuning Yang, Andrew J. Mason. 1396-1399 [doi]
• Design of 1mWCMOS OOK super-regenerative receiver for 402-405MHz medical applicationsSamar Alsaegh, Sherif Ahmed Saleh Mohamed, Yiannos Manoli. 1400-1403 [doi]
• An adaptive wireless powering and data telemetry system for optic nerve stimulationXing Li, Yan Lu, Chi-Ying Tsui, Wing-Hung Ki. 1404-1407 [doi]
• A CMOS fully-integrated wireless power receiver for autonomous implanted devicesFabian L. Cabrera, Fernando Rangel de Sousa. 1408-1411 [doi]
• Solar and thermal energy harvesting with a wearable jacketQuinn Brogan, Thomas O'Connor, Dong Sam Ha. 1412-1415 [doi]
• Novel grid-based power routing scheme for regular controllable-polarity FET arrangementsOdysseas Zografos, Pierre-Emmanuel Gaillardon, Giovanni De Micheli. 1416-1419 [doi]
• Simulation of TaOx-based complementary resistive switches by a physics-based memristive modelAnne Siemon, Stephan Menzel, A. Marchewka, Yoshifumi Nishi, Rainer Waser, Eike Linn. 1420-1423 [doi]
• Novel single-electron information-processing circuits mimicking behavior of ant groupsYuji Obi, Takahide Oya. 1424-1427 [doi]
• Origin of stochastic resistive switching in devices with phenomenologically identical initial statesQingjiang Li, Ali Khiat, Iulia Salaoru, Hui Xu, Themistoklis Prodromakis. 1428-1431 [doi]
• State dependent statistical timing model for voltage scaled circuitsAras Pirbadian, Muhammad S. Khairy, Ahmed M. Eltawil, Fadi J. Kurdahi. 1432-1435 [doi]
• Linear and bi-linear interpolation circuits using selector logics and their evaluationsMasashi Shio, Masao Yanagisawa, Nozomu Togawa. 1436-1439 [doi]
• A 2.5GHz ADPLL with PVT-insensitive ΔΣ dithered time-to-digital conversion by utilizing an ADDLLYanfeng Li, Ni Xu, Woogeun Rhee, Zhihua Wang. 1440-1443 [doi]
• An effective iterative density aware detailed placement algorithmQuan Zhou, Junying Hu, Qiang Zhou. 1444-1447 [doi]
• Constrained binding and scheduling of triplicated algorithm for fault tolerant datapath synthesisMineo Kaneko, Yutaka Tsuboishi. 1448-1451 [doi]
• CMOS inverter analytical delay model considering all operating regionsFelipe S. Marranghello, André Inácio Reis, Renato P. Ribas. 1452-1455 [doi]
• ECHO: A novel method for the multiplierless design of constant array vector multiplicationLevent Aksoy, Paulo F. Flores, José C. Monteiro. 1456-1459 [doi]
• Scan-based attack on the LED block cipher using scan signaturesMika Fujishiro, Masao Yanagisawa, Nozomu Togawa. 1460-1463 [doi]
• Abstracting Single Event Transient characteristics variations due to input patterns and fan-outGhaith Bany Hamad, Syed Rafay Hasan, Otmane Aït Mohamed, Yvon Savaria. 1468-1471 [doi]
• SimParallel: A high performance parallel SystemC simulator using hierarchical multi-threadingMoo-Kyoung Chung, Jun Kyoung Kim, Soojung Ryu. 1472-1475 [doi]
• A novel secure MIMO cognitive networkYang Xiao, Pengpeng Lan, Dong Wang. 1476-1479 [doi]
• ESD protection design for wideband RF applications in 65-nm CMOS processLi-Wei Chu, Chun-Yu Lin, Ming-Dou Ker, Ming-Hsiang Song, Jeng-Chou Tseng, Chewnpu Jou, Ming-Hsien Tsai. 1480-1483 [doi]
• A decision feedback equalizer with channel-dependent power consumption for 60-GHz receiversIlias Sourikopoulos, Antoine Frappe, Andreas Kaiser, Laurent Clavier. 1484-1487 [doi]
• A 12.5-Gb/s near-GND transceiver for wire-line UHD video interfacesSeok Kim, Jung-Myung Kang, Xuefan Jin, Se-Ung Park, Ja-Hoon Jin, Kee-Won Kwon, Jung-Hoon Chun, Jung-Ho Lee, Jun-Young Park, Dae-Young Lee. 1488-1491 [doi]
• A 20-Gb/s 1.27pJ/b low-power optical receiver front-end in 65nm CMOSGyu-Seob Jeong, Hankyu Chi, Kyungock Kim, Deog Kyoon Jeong. 1492-1495 [doi]
• Highly flexible active notch filter for Cognitive RadioRaafat Lababidi, Frédéric Le Roy, Ali Mansour, Bernard Jarry, Ali Louzir. 1496-1499 [doi]
• Zero power 4.95Gbps HDMI transmitterNitin Gupta, Tapas Nandy, Paramjeet Singh Sahni, Manish Garg, Jai Narayan Tripathi. 1500-1503 [doi]
• Low-latency wireless LAN system using polling-based MACRyosuke Fujiwara, Masayuki Miyazaki, Makoto Katagishi. 1504-1507 [doi]
• 5-GHz SiGe linearity power amplifier using integrated feedforward architecture for WLAN applicationsKuei-Cheng Lin, Hwann-Kaeo Chiou, Po-Chang Wu, Hann-Huei Tsai, Ying-Zong Juang. 1508-1511 [doi]
• A theoretical study of the statistical and spectral properties of polar transmitter signalsMohamed Ibrahim, Bin Yang. 1512-1515 [doi]
• A 20-Gbps low jitter analog clock recovery circuit for ultra-wide band Radio systemsMohamed Hamouda, Georg Fischer, Robert Weigel, A. Baenisch, Thomas Ussmueller. 1516-1519 [doi]
• A variation tolerant driving technique for all-digital self-timed 3-level signaling high-speed SerDes transceivers for on-chip networksRamy N. Tadros, Abdelrahman H. Elsayed, Maged Ghoneima, Yehea I. Ismail. 1520-1523 [doi]
• Reconfiguration network design for SEU recovery in FPGAsEdiz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai. 1524-1527 [doi]
• Image recognition system using an optical Fourier transform on a dynamically reconfigurable vision architectureYuki Kamikubo, Minoru Watanabe, Shoji Kawahito. 1528-1531 [doi]
• Pipeline scanning architecture with computation reduction for rectangle pattern matching in real-time traffic sign detectionAnh Tuan Hoang, Tetsushi Koide, Masaharu Yamamoto, Mutsumi Omori. 1532-1535 [doi]
• Optimized cubic chebyshev interpolator for elementary function hardware implementationsMasoud Sadeghian, James E. Stine, E. George Walters. 1536-1539 [doi]
• n +1}Chip-Hong Chang, Sachin Kumar. 1540-1543 [doi]
• Image processing using approximate datapath unitsMadhu Vasudevan, Chaitali Chakrabarti. 1544-1547 [doi]
• Design of a 5 GS/s fully-digital digital-to-analog converterVictor Adrian, Yin Sun, Joseph Sylvester Chang. 1548-1551 [doi]
• A fast deep learning system using GPUZhilu Chen, Jing Wang, Haibo He, Xinming Huang. 1552-1555 [doi]
• An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial linksTaras Iakymchuk, Alfredo Rosado, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Angel Jiménez-Fernandez, Alejandro Linares-Barranco, Gabriel Jimenez-Moreno. 1556-1559 [doi]
• A biomimetic nanoelectronic neuron with enhanced spike timingChih-Chieh Hsu, Alice C. Parker. 1560-1563 [doi]
• A generalised conductance-based silicon neuron for large-scale spiking neural networksRunchun Wang, Tara Julia Hamilton, Jonathan Tapson, André van Schaik. 1564-1567 [doi]
• Silicon neuron dedicated to memristive spiking neural networksGwendal Lecerf, Jean Tomas, Soren Boyn, Stephanie Girod, Ashwin Mangalore, Julie Grollier, Sylvain Saïghi. 1568-1571 [doi]
• A 7-transistor-per-cell, high-density analog storage array with 500µV update accuracy and greater than 60dB linearityLiang Zhou, Shantanu Chakrabartty. 1572-1575 [doi]
• The accuracy and scalability of continuous-time Bayesian inference in analogue CMOS circuitsPrzemyslaw Mroszczyk, Piotr Dudek. 1576-1579 [doi]
• Characterization of processing errors on analog fully-programmable cellular sensor-processor arraysStephen J. Carey, Ákos Zarándy, Piotr Dudek. 1580-1583 [doi]
• CheckerBoard binary CNN coreAri Paasio. 1584-1587 [doi]
• A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processingRyusuke Nebashi, Noboru Sakimura, Hiroaki Honjo, Ayuka Morioka, Yukihide Tsuji, Kunihiko Ishihara, Keiichi Tokutome, Sadahiko Miura, Shunsuke Fukami, Keizo Kinoshita, Takahiro Hanyu, Tetsuo Endoh, Naoki Kasai, Hideo Ohno, Tadahiko Sugibayashi. 1588-1591 [doi]
• An overview of decimator structures for efficient sigma-delta converters: Trends, design issues and practical solutionsGerardo Molina Salgado, Gordana Jovanovic-Dolecek, Jose M. de la Rosa. 1592-1595 [doi]
• Low-power comb decimation filter for RF Sigma-Delta ADCsAlp Kilic, Delaram Haghighitalab, Habib Mehrez, Hassan Aboushady. 1596-1599 [doi]
• Reduce energy requirements by coupling a poly-phase pre-filter and cic filter in high-performance Sigma-Delta A/D convertersFredric J. Harris. 1600-1603 [doi]
• Integer-coefficient FIR filter sharpening for equiripple stopbands and maximally flat passbandsJeffrey O. Coleman. 1604-1607 [doi]
• A custom signal processor based neuroprosthesis intended to recover urinary bladder functionsArnaldo Mendez, Mohamad Sawan. 1608-1611 [doi]
• Closed loop inverse load modulation power control by magnetic field diminishment in inductively powered biomedical implantsChristian Brendler, Naser Pour Aryan, Viola Rieger, Albrecht Rothermel. 1612-1615 [doi]
• On using compressed sensing for efficient transmission & storage of electric organ dischargeHussein Al-Azzawi, Hong Huang, Satyajayant Misra, Wei Tang. 1616-1619 [doi]
• Monitoring of repeated head impacts using time-dilation based self-powered sensingKenji Aono, Tracey Covassin, Shantanu Chakrabartty. 1620-1623 [doi]
• A compact stacked-device output driver in low-voltage CMOS TechnologyYousr Ismail, Chih-Kong Ken Yang. 1624-1627 [doi]
• Computationally efficient clustering of power supplies in heterogeneous real time systemsInna Vaisband, Eby G. Friedman. 1628-1631 [doi]
• A multi-output on-chip switched-capacitor DC-DC converter for near- and sub-threshold power modesYingbo Zhao, Yintang Yang, Kaushik Mazumdar, Xinfei Guo, Mircea R. Stan. 1632-1635 [doi]
• An Efficient RF power harvester for low input power with reduced dead-zoneHugo B. Goncalves, Jorge R. Fernandes, Taimur Gibran Rabuske, Miguel A. Martins. 1636-1639 [doi]
• A 60-GHz energy harvesting module with on-chip antenna and switch for co-integration with ULP radios in 65-nm CMOS with fully wireless mm-wave power transfer measurementHao Gao, Marion Matters-Kammerer, Pieter Harpe, Dusan M. Milosevic, Arthur H. M. van Roermund, Jean-Paul M. G. Linnartz, Peter G. M. Baltus. 1640-1643 [doi]
• Highly scalable neuromorphic hardware with 1-bit stochastic nano-synapsesOmid Kavehei, Efstratios Skafidas. 1648-1651 [doi]
• Implementation of the conscience mechanism using single-electron transfer in competitive learningRan Xiao, Chunhong Chen. 1652-1655 [doi]
• Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuitArne Heittmann, Tobias G. Noll. 1656-1659 [doi]
• TSPC Flip-Flop circuit design with three-independent-gate silicon nanowire FETsXifan Tang, Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli. 1660-1663 [doi]
• A staircase conductance modulation scheme for input-current-shaping in switched-capacitor DC-DC convertersSally Safwat, Rinkle Jain, Dawson Kesling. 1664-1667 [doi]
• A 2+1 multi-bit incremental architecture using Smart-DEM algorithmYao Liu, Edoardo Bonizzoni, Franco Maloberti. 1668-1671 [doi]
• A top-down optimization methodology for SC filter circuit designHugo Serra, Rui Santos-Tavares, Nuno F. Paulino. 1672-1675 [doi]
• Using the sensitivity analysis of the noise spectral density and the sensitivity analysis of the noise figure for practical circuit designJosef Dobes, Jan Divin, Jiri Svaton, Frantisek Vejrazka. 1676-1679 [doi]
• Hexagonal multi-beam analog RF aperture arrayChamith Wijenayake, Arjuna Madanayake, Len T. Bruton. 1680-1683 [doi]
• High performance MIMO detector based on bidirectional path preserving trellis searchJienan Chen, Lian Huai, JianHao Hu, Gerald E. Sobelman. 1684-1687 [doi]
• Low power reduced-complexity error-resilient MIMO detectorChung-An Shen, Muhammad S. Khairy, Ahmed M. Eltawil, Fadi J. Kurdahi. 1688-1691 [doi]
• A low-complexity composite QR decomposition architecture for MIMO detectorJi-Hwan Yoon, Dongyeob Shin, Jongsun Park. 1692-1695 [doi]
• A 4 × 4 multiplier-divider-less K-best MIMO decoder up to 2.7 GbpsThi Hong Tran, Hiroshi Ochi, Yuhei Nagao. 1696-1699 [doi]
• Hardware efficient approximative matrix inversion for linear pre-coding in massive MIMOHemanth Prabhu, Ove Edfors, Joachim Neves Rodrigues, Liang Liu, Fredrik Rusek. 1700-1703 [doi]
• An improved iterative decoding scheme based on error-resistant arithmetic codeQiuzhen Lin, Kwok-Wo Wong. 1704-1707 [doi]
• Band-selective estimation for IQ-imbalance and carrier frequency offset in OFDM systemsChih-Hung Kuo, Ping Ma, Chi-Fang Chang. 1708-1711 [doi]
• Hybrid DFSF-BP equalization for ATSC DTV receiversYanjie Peng, Andrew G. Klein, Xinming Huang. 1712-1715 [doi]
• Performance comparison of hybrid partial response detectors over frequency-selective fading channelsYanjie Peng, Xinming Huang. 1716-1719 [doi]
• Efficient estimation of a sequence of frequencies for M-ary CPFSK demodulationSaman S. Abeysekera. 1720-1723 [doi]
• An energy-efficient parallel-processing method based on master-hibernating DVFSMasaki Hamamoto, Masanao Yamaoka. 1724-1727 [doi]
• Extensional design for noise-tolerate MRF standard cells via global mappingYan Li, JianHao Hu. 1728-1731 [doi]
• An architecture for low-power compressed sensing and estimation in wireless sensor nodesDavid Bellasi, Riccardo Rovatti, Luca Benini, Gianluca Setti. 1732-1735 [doi]
• Quantitative comparison of the power reduction techniques for samsung reconfigurable processorHoyoung Kim, Soojung Ryu, Abhishek A. Sinkar, Nam Sung Kim. 1736-1739 [doi]
• Critical-path aware power consumption optimization methodology (CAPCOM) using mixed-VTH cells for low-power SOC designsGregory J. Y. Lin, Chienbo B. Hsu, James B. Kuo. 1740-1743 [doi]
• Asynchronous test hardware for Null Convention LogicNastaran Nemati, Mark C. Reed, Michael R. Frater. 1744-1747 [doi]
• A new algorithm for single residue digit error correction in Redundant Residue Number SystemThian Fatt Tay, Chip-Hong Chang. 1748-1751 [doi]
• An efficient high-throughput LSI architecture for a synchronization block applied to real-time optical OFDM systemsReza Ghanaatian, Mahdi Shabany, Mohammad Sharifkhani. 1752-1755 [doi]
• Unambiguous I-cache testing using software-based self-testing methodologyChing-Wen Lin, Chung-Ho Chen. 1756-1759 [doi]
• Packet logging mechanism for adaptive online fault detection on Network-on-ChipLing Kim Loo, Chia Yee Ooi, V. Y. Liew, Yuan Wen Hau, Muhammad N. Marsono. 1760-1763 [doi]
• A clockless, multi-stable, CMOS analog circuitMohammad Alhawari, Michael H. Perrott. 1764-1767 [doi]
• A novel Injection Locked Rotary Traveling Wave OscillatorZhanjun Bai, Xing Zhou, Ralph Mason. 1768-1771 [doi]
• Design of a frequency reference based on a PVT-independent transmission line delayFlorian De Roose, Valentijn De Smedt, Wouter Volkaerts, Michiel Steyaert, Georges G. E. Gielen, Patrick Reynaert, Wim Dehaene. 1772-1775 [doi]
• Design of a wideband low power FMCW synthesizer in 65 nm CMOS for radar applicationsSupeng Liu, Yuanjin Zheng, Xiaofeng He. 1776-1779 [doi]
• N-phase synchronization of asymmetric attractors in a ring of coupled chaotic circuitsTakuya Nishimoto, Yoko Uwate, Yasuteru Hosokawa, Yoshifumi Nishio, Daniele Fournier-Prunaret. 1780-1783 [doi]
• Towards a graphic tool of structural controllability of temporal networksYujian Pan, Xiang Li. 1784-1787 [doi]
• Dynamical networks with on-off stochastic connections: Beyond fast switchingRussell Jeter, Igor Belykh. 1788-1791 [doi]
• Observer design for consensus of general fractional-order multi-agent systemsYang Li, Wenwu Yu, Guanghui Wen, Xinghuo Yu, Lingling Yao. 1792-1795 [doi]
• Consensus and synchronization of complex networks via proportional-integral couplingDaniel Alberto Burbano, Mario di Bernardo. 1796-1799 [doi]
• Volatile and nonvolatile selective operation of a two-terminal gap-type atomic switchTsuyoshi Hasegawa, Tohru Tsuruoka, Masakazu Aono. 1800-1803 [doi]
• Nonlinear analysis of multi-converter power systems for microgridsChika O. Nwankpa, Juan C. Jiménez, Sachi Jayasuriya. 1804-1807 [doi]
• Convergence/divergence analysis of implicit Z-bus power flow for general distribution networksHsiao-Dong Chiang, Tian-Qi Zhao, Jiao-Jiao Deng, Kaoru Koyanagi. 1808-1811 [doi]
• Chordal relaxation of OPF for multiphase radial networksLingwen Gan, Steven H. Low. 1812-1815 [doi]
• Continuation techniques for reachability analysis of uncertain power systemsMaxim Markov, Mehdi Saghafi, Ian A. Hiskens, Harry Dankowicz. 1816-1819 [doi]
• Robust consensus-based droop control for multiple power converters in isolated micro-gridsLin-Yu Lu, Chia-Chi Chu. 1820-1823 [doi]
• Quantitative estimation of biological cell surface receptors by segmenting conventional fluorescence microscopy imagesJulien Ghaye, Chiara Succa, Danilo Demarchi, Sinan K. Muldur, Pascal Colpo, Paolo Silacci, Guy Vergeres, Giovanni De Micheli, Sandro Carrara. 1824-1827 [doi]
• A novel approach to perform reversible addition/subtraction operations using deoxyribonucleic acidAnkur Sarker, Hafiz Md. Hasan Babu, Md. Saiful Islam 0003. 1828-1831 [doi]
• An ISFET based analogue ratiometric method for DNA methylation detectionMelpomeni Kalofonou, Chris Toumazou. 1832-1835 [doi]
• Automated two stage detection and analyzer system in multipartitioned Digital Microfluidic BiochipsPranab Roy, Aatreyi Bal, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta. 1836-1840 [doi]
• Energy-efficient configurable discrete wavelet transform for neural sensing applicationsTang-Hsuan Wang, Po-Tsang Huang, Kuan-Neng Chen, Jin-Chern Chiou, Kuo-Hua Chen, Chi-Tsung Chiu, Ho-Ming Tong, Ching-Te Chuang, Wei Hwang. 1841-1844 [doi]
• An area-efficient on-chip temperature sensor with nonlinearity compensation using injection-locked oscillator (ILO)Wongyu Shin, Seungwook Paek, Lee-Sup Kim. 1845-1848 [doi]
• A 220 × 128 120 mW 60 frames/s current mode polarization imager for in vivo optical neural recordingTimothy York, Viktor Gruev, Debajit Saha, Baranidharan Raman. 1849-1852 [doi]
• FPGA implementation of the CAR Model of the cochleaChetan Singh Thakur, Tara Julia Hamilton, Jonathan Tapson, André van Schaik, Richard F. Lyon. 1853-1856 [doi]
• Octagonal CMOs image sensor with strobed RGB LED illumination for wireless capsule endoscopySatoshi Yoshizaki, Alexantrou Serb, Yan Liu, Timothy G. Constandinou. 1857-1860 [doi]
• A low-light SPAD vision arrayAndrew Berkovich, Pamela Abshire. 1861-1864 [doi]
• Energy-aware current-mode inter-chip link for a dependable GALS NoC platformHirokatsu Shirahama, Akira Mochizuki, Yuma Watanabe, Takahiro Hanyu. 1865-1868 [doi]
• A 10-Gb/s 6-Vpp differential modulator driver in 65-nm CMOSYoonsoo Kim, Woo-Rham Bae, Deog Kyoon Jeong. 1869-1872 [doi]
• A low-power Spread Spectrum Clock Generator with an embeddable half-integer division ratio interpolatorHsi-En Liu, Shih-Che Hung, Chih-Wen Lu, Tsin-Yuan Chang. 1873-1876 [doi]
• Exploiting a micro Pirani gauge for multifonctionM. Zhang, N. Llaser, X. Wang, D. Ibrahima. 1877-1880 [doi]
• A 60-dB Gain OTA operating at 0.25-V power supply in 130-nm digital CMOS processLuis H. C. Ferreira, Sameer R. Sonkusale. 1881-1884 [doi]
• A 100 Gb/s transimpedance amplifier in 65 nm CMOS technology for optical communicationsMaruf N. Ahmed, Joseph Chong, Dong Sam Ha. 1885-1888 [doi]
• Micropower two-stage amplifier employing recycling current-buffer Miller compensationWei Wang, Zushu Yan, Pui-In Mak, Man Kay Law, Rui Paulo Martins. 1889-1892 [doi]
• Sampled-data operational-amplifier with ultra-low supply voltage and sub µW power consumptionPinar Basak Basyurt, Devrim Yilmaz Aksin, Edoardo Bonizzoni, Franco Maloberti. 1893-1896 [doi]
• Inductor-less bandwidth-extension technique applied to CMOS differential trans-impedance amplifierCheng-Ta Chan, Oscal T.-C. Chen. 1897-1900 [doi]
• A high efficiency robust IR-UWB receiver design for high data rate CM-range communicationsDang Liu, Shuli Geng, Woogeun Rhee, Zhihua Wang. 1901-1904 [doi]
• A non-coherent IR-UWB receiver for high sensitivity short distance estimationMarco Crepaldi, P. Motto Ros, Alberto Bonanno, M. Morello, Danilo Demarchi. 1905-1908 [doi]
• A SAW-less dual-band RF front-end for IR-UWB receiver in 65nm CMOSVincenzo Chironi, Stefano D'Amico, Mirko Pasca, Marcello De Matteis, Andrea Baschirotto. 1909-1912 [doi]
• An efficient orthogonal pulse set generator for high-speed sub-GHz UWB communicationsYang-Guo Li, Mohammad Rafiqul Haider, Yehia Massoud. 1913-1916 [doi]
• Photo album compression By leveraging temporal-spatial correlations and HEVCYonggen Ling, Oscar C. Au, Ruobing Zou, Jiahao Pang, Haiyan Yang, Amin Zheng. 1917-1920 [doi]
• Low complexity Neighboring Block based Disparity Vector Derivation in 3D-HEVCJewon Kang, Ying Chen, Li Zhang, Marta Karczewicz. 1921-1924 [doi]
• Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decodersRuhan Conceicao, J. Claudio de Souza, Ricardo Jeske, Marcelo Schiavon Porto, Bruno Zatt, Luciano Volcan Agostini. 1925-1928 [doi]
• Gradient-based PU size selection for HEVC intra predictionYi-Ching Ting, Tian-Sheuan Chang. 1929-1932 [doi]
• Rate distortion modeling and adaptive rate control scheme for high efficiency video coding (HEVC)Lin Sun, Oscar C. Au, Cong Zhao, Fiona H. Huang. 1933-1936 [doi]
• Rapid design space exploration of two-level unified cachesJingyu Deng, Yun Liang, Guojie Luo, Guangyu Sun. 1937-1940 [doi]
• Design of SRAM PUF with improved uniformity and reliability utilizing device aging effectAchiranshu Garg, Tony Tae-Hyoung Kim. 1941-1944 [doi]
• Improving data cache performance using Persistence Selective CachingSumeet S. Kumar, Rene van Leuken. 1945-1948 [doi]
• High-voltage tolerant circuit design for fully CMOS compatible multiple-time programmable memoriesChihYang Huang, Hongchin Lin, Chia-You Wu. 1949-1952 [doi]
• High-performance low-power magnetic tunnel junction based non-volatile flip-flopTaehui Na, Kyungho Ryu, Jisu Kim, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang. 1953-1956 [doi]
• A spare router based reliable Network-on-Chip designNavonil Chatterjee, Santanu Chattopadhyay, Kanchan Manna. 1957-1960 [doi]
• Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on ChipsYuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch, Yuxiang Fu, Minglun Gao. 1961-1964 [doi]
• A monitored NoC with runtime path adaptationEdson I. Moreno, Thais Webber, César A. M. Marcon, Fernando Moraes, Ney Calazans. 1965-1968 [doi]
• A signal processor for Gaussian message passingHarald Kroll, Stefan Zwicky, Reto Odermatt, Lukas Bruderer, Andreas Burg, Qiuting Huang. 1969-1972 [doi]
• Load adaptive multi-channel distribution and arbitration in unequal RF interconnected WiNoCRuizhe Wu, Dan Zhao. 1973-1976 [doi]
• Batteryless electrostatic energy harvester and control systemAntônio Carlos M. de Queiroz, Mayli Silva de Souza. 1977-1980 [doi]
• Solar energy harvesting with light emitting diodesGolsa Moayeri Pour, Walter D. Leon-Salas. 1981-1984 [doi]
• Chip-on-mud: Ultra-low power ARM-based oceanic sensing system powered by small-scale benthic microbial fuel cellsGyouho Kim, Adriane Wolfe, Richard Bell, Suyoung Bang, Yoonmyung Lee, Inhee Lee, Yejoong Kim, Lewis Hsu, Jeffrey Kagan, Meriah Arias-Thode, Bart Chadwick, Dennis Sylvester, David Blaauw. 1985-1988 [doi]
• Power management with energy harvesting from a headphone jackCheng-Han Hsieh, Chung-Yen Du, Shuenn-Yuh Lee. 1989-1992 [doi]
• A piezoelectric energy harvesting interface circuit using one-shot pulse transformer boost converter based on water bucket fountain strategyYing Khai Teh, Philip K. T. Mok. 1993-1996 [doi]
• Complexity in heterogeneous systems on chips: Dsign and analysis challengesDimitri Galayko, Elena Blokhina, Eldar Zianbetov, Andrii Dudka, François Anceau, Éric Colinet, Anton Korniienko, Jérôme Juillard, Philippe Basset. 1997-2000 [doi]
• The design of low complexity low power pipelined short length Winograd Fourier transformsAdem Coskun, Izzet Kale, Richard C. S. Morling, Robert Hughes, Stephen Brown, Piero Angeletti. 2001-2004 [doi]
• Effectiveness of artificial neural network with time-varying coupling systemYoko Uwate, Yoshifumi Nishio. 2005-2008 [doi]
• System-on-chip considerations for CMOS fluidic and biointerface applicationsTimir Datta-Chaudhuri, Pamela Abshire, Elisabeth Smela. 2009-2012 [doi]
• Opportunities and challenges for the virtual prototyping of synthetic biological functionsMorgan Madec, François Pécheux, Fabienne Jézéquel, Yves Gendrault, Christophe Lallement, Jacques Haiech. 2013-2016 [doi]
• Overview of resistive switching memory (RRAM) switching mechanism and device modelingShimeng Yu. 2017-2020 [doi]
• Ab initio modeling of resistive switching mechanism in binary metal oxidesBlanka Magyari-Köpe, Liang Zhao, Yoshio Nishi, Katsumasa Kamiya, Moon Young Yang, Kenji Shiraishi. 2021-2024 [doi]
• Modeling and simulation of electrochemical metallization memory cellsStephan Menzel. 2025-2028 [doi]
• Statistical modeling of program and read variability in resistive switching devicesStefano Ambrogio, Simone Balatti, Antonio Cubeta, Daniele Ielmini. 2029-2032 [doi]
• Qualitative SPICE modeling accounting for volatile dynamics of TiO2 memristorsRadu Berdan, Ali Khiat, Christos Papavassiliou, Themistoklis Prodromakis. 2033-2036 [doi]
• Advances in non-radiative resonant inductive coupling wireless Power Transfer: A comparison of alternative circuit and system models driven by emergent applicationsElisenda Bou-Balust, Raymond Sedwick, Patrick Hu, Eduard Alarcón. 2037-2040 [doi]
• An experimental technique for design of practical Wireless Power Transfer systemsVamsi Talla, Joshua R. Smith. 2041-2044 [doi]
• Optimal coil size ratios for wireless power transfer applicationsBenjamin H. Waters, Brody J. Mahoney, Gunbok Lee, Joshua R. Smith. 2045-2048 [doi]
• Efficiency enhancement techniques and a dual-band approach in RF rectifiers for wireless power harvestingPouya Kamalinejad, Kamyar Keikhosravy, Reza Molavi, Shahriar Mirabbasi, Victor C. M. Leung. 2049-2052 [doi]
• A multimodal investigation of in vivo muscle behavior: System design and data analysisXin Chen, Sheng Zhong, Yangyang Niu, Siping Chen, Tianfu Wang, Shing-Chow Chan, Zhiguo Zhang. 2053-2056 [doi]
• Efficient learning based face hallucination approach via facial standard deviation priorLiang Chen, Ruimin Hu, Junjun Jiang, Zhen Han. 2057-2060 [doi]
• A low-complexity intestinal lumen detection method for wireless endoscopy imagesJianlong Zhang, Dan Wang, Xiang Xie, Guolin Li, Yingke Gu, Zhihua Wang. 2061-2064 [doi]
• Eye-gesture controlled intelligent wheelchair using Electro-OculographyTheja Ram Pingali, Sarthak Dubey, Anurag Shivaprasad, Arpit Varshney, Satish Ravishankar, Govinda Ram Pingali, Niyanth Krishna Polisetty, Nikhil Manjunath, Padmaja K. V.. 2065-2068 [doi]
• A wirelessly monitoring system design for Total Hip Replacement surgeryHong Chen, Shaojie Su, Zhihua Wang, Xu Zhang. 2069-2072 [doi]
• Ultra low leakage synaptic scaling circuits for implementing homeostatic plasticity in neuromorphic architecturesGiovanni Rovere, Qiao Ning, Chiara Bartolozzi, Giacomo Indiveri. 2073-2076 [doi]
• The Synaptic Kernel Adaptation NetworkRichard James Sofatzis, Saeed Afshar, Tara Julia Hamilton. 2077-2080 [doi]
• Realization of processing blocks of CNN based CASA system on CPU and FPGAO. Levent Savkay, Evren Cesur, Nerhun Yildiz, Mustak E. Yalcin, Vedat Tavsanoglu. 2081-2084 [doi]
• Memristors as synapse emulators in the context of event-based computationA. Serb, Radu Berdan, Ali Khiat, S. L. W. Li, E. Vasilaki, Christos Papavassiliou, Themistoklis Prodromakis. 2085-2088 [doi]
• Design and optimization of continuous-time filters using geometric programmingSiddharth Seth, Boris Murmann. 2089-2092 [doi]
• A reconfigurable FGMOS based OTA-C filterJohn Richard E. Hizon, Esther Rodríguez-Villegas. 2093-2096 [doi]
• Stability analysis and design methodology for an Åkerberg-Mossberg filterGerald Hilber, Alexander Burgstaller, E. H. Stitz, Andreas Rauchenecker, Timm Ostermann, Janos Gila, Martin Schiefer. 2097-2100 [doi]
• Low-power fine-tuning switched-resistor reconfigurable filterAmorn Jiraseree-amornkun, Wanlop Surakampontorn. 2101-2104 [doi]
• Bessel-Butterworth transitional filtersIgor M. Filanovsky. 2105-2108 [doi]
• Estimation method for nonlinearity mismatch in time-interleaved analog-to-digital convertersYinan Wang, Hui Xu, Li, Nan Li, Zhaolin Sun. 2109-2112 [doi]
• A simple digital architecture for a harmonic-cancelling sine-wave synthesizerPasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran. 2113-2116 [doi]
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• A comprehensive comparison of superior triple-threshold-voltage 7-transistor, 8-transistor, and 9-transistor SRAM cellsHong Zhu, Volkan Kursun. 2185-2188 [doi]
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• An OpenCL runtime system for a heterogeneous many-core virtual platformKuan-Chung Chen, Chung-Ho Chen. 2197-2200 [doi]
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• Uncovering interaction patterns of multi-agent collective motion via complex network analysisXiaoke Xu, Michael Small, F. Javier Perez-Barberia. 2213-2216 [doi]
• Deflection routing in complex networksSoroush Haeri, Ljiljana Trajkovic. 2217-2220 [doi]
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• An RNS barrett modular multiplication architectureDimitrios Schinianakis, Thanos Stouraitis. 2229-2232 [doi]
• Method for designing multi-channel RNS architectures to prevent power analysis SCAHéctor Pettenghi, Jude Angelo Ambrose, Ricardo Chaves, Leonel Sousa. 2233-2236 [doi]
• High-speed FFT processors based on redundant number systemsAmir Kaivani, Seok-Bum Ko. 2237-2240 [doi]
• Area efficient low-sensitivity lumped madaline based on Continuous Valued Number SystemBabak Zamanlooy, Mitra Mirhassani. 2241-2244 [doi]
• Coherer is the elusive memristorGaurav Gandhi, Varun Aggarwal, Leon Chua. 2245-2248 [doi]
• A mutator-based meminductor emulator circuitMaheshwar Prasad Sah, Ram Kaji Budhathoki, Changju Yang, Hyongsuk Kim. 2249-2252 [doi]
• Memristors-based Ternary Content Addressable Memory (mTCAM)Le Zheng, Sangho Shin, Sung-Mo Steve Kang. 2253-2256 [doi]
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