All-digital ADC/TDC using TAD architecture for highly-durable time-measurement ASIC

Takamoto Watanabe, Hirofumi Isomura. All-digital ADC/TDC using TAD architecture for highly-durable time-measurement ASIC. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 674-677, IEEE, 2014. [doi]

Abstract

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