Neil Weste - researchr alias

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Viewing Publication 1 - 30 from 30

2023

Wi-Fi HaLow Internet of Things System on Chip (SoC) in Sub-1 GHzM. Surendra Raju, Aman Shrestha, Andrew Terry, Eyal Mendel, Jaric Thorning, Julius Baxter, Mohammed Mohammed, Neil Weste, Rama Kishore Chikkam, Yingbo Zhu. iscit 2023: 1-5 [doi]

2017

Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave SynthesisPasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran. tcas, 64-I(2):296-309, 2017. [doi]

2016

The effect of amplitude resolution and mismatch on a digital-to-analog converter used for digital harmonic-cancelling sine-wave synthesisPasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran. iscas 2016: 2018-2021 [doi]

2015

Design of a digital harmonic-cancelling sine-wave synthesizer with 100 MHz output frequency, 43.5 dB SFDR, and 2.26 mW powerPasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran. iscas 2015: 3052-3055 [doi]

2014

A simple digital architecture for a harmonic-cancelling sine-wave synthesizerPasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran. iscas 2014: 2113-2116 [doi]

2007

A Power-Efficient 5.6-GHz Process-Compensated CMOS Frequency DividerIvan Siu-Chuang Lu, Neil Weste, Sri Parameswaran. tcas, 54-II(4):323-327, 2007. [doi]

2006

ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-Ends: A Power and Performance PerspectiveIvan Siu-Chuang Lu, Neil Weste, Sri Parameswaran. vlsid 2006: 575-580 [doi]

2005

The effect of receiver front-end non-linearity on DS-UWB systems operating in the 3 to 4 GHz bandIvan Siu-Chuang Lu, Neil Weste, Sri Parameswaran. wcnc 2005: 776-781 [doi]

2002

A limitation on active filter dynamic rangeJ. Harrison, Neil Weste. iscas 2002: 537-540 [doi]

2001

Energy storage and Gramians of ladder filter realisationsJ. Harrison, Neil Weste. iscas 2001: 29-32 [doi]

2000

Issues in high-speed WLANsDavid J. Skellern, Alex C. K. Lam, Neil Weste. icassp 2000: 3698-3701 [doi]

1999

A wideband quadrature LO generator in digital CMOSJeffrey Harrison, Neil Weste. cicc 1999: 657-659 [doi]

Who Put the Sugar in Sydney Harbor?Neil Weste. arvlsi 1999: 358 [doi]

1998

1997

1994

OK, If These CAD Tools Are So Great, Why Isn t My Chip Design On Schedule?Neil Weste. iccd 1994: 2-8

1983

A vertically integrated VLSI design environmentJonathan B. Rosenberg, David G. Boyer, John A. Dallen, Stephen W. Daniel, Charles J. Poirier, John Poulton, C. Durward Rogers, Neil Weste. dac 1983: 31-38 [doi]

Dynamic Time Warp Pattern Matching Using an Integrated Multiprocessing ArrayNeil Weste, David J. Burr, Bryan D. Ackland. TC, 32(8):731-744, 1983.

1981

An Integrated Multiprocessing Array for Time Warp Pattern MatchingBryan D. Ackland, Neil Weste, David J. Burr. isca 1981: 197-216

The Edge Flag Algorithm - A Fill Method for Raster Scan DisplaysBryan D. Ackland, Neil Weste. TC, 30(1):41-48, 1981.

A high speed array computer for dynamic time warpingDavid J. Burr, Bryan D. Ackland, Neil Weste. icassp 1981: 471-474 [doi]

Virtual grid symbolic layoutNeil Weste. dac 1981: 225-233 [doi]

1980

Real time animation playback on a frame store display systemBryan D. Ackland, Neil Weste. siggraph 1980: 182-188 [doi]

An IC design station needs a high performance color graphic displayNeil Weste, Bryan D. Ackland. dac 1980: 285-291 [doi]

1978

A color graphics system for I.C. mask design and analysisNeil Weste. dac 1978: 199-205 [doi]

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