Table of Contents

• A practical technique for benefit-cost analysis of Computer-Aided Design and Drafting SystemsRatilal R. Shah, G. Y. Yan. [doi]
• An integrated system for interactive editing of schematics, logic simulation and PCB layout designHedayat Markus Bayegan, Einar J. Aas. 1-8 [doi]
• Maintaining integrity in complex shape definitionsAdrian Baer. 9-15 [doi]
• "A user's experience in Computer Aided Manufacturing" or "CAM" at GTE - Automatic ElectricH. T. Olson. 23-25 [doi]
• Distributed processing in manufacturing at GTE Automatic ElectricRalph J. Moses. 26-33 [doi]
• Computer aids systems map-based record systemsA. V. Bennettson. 34-47 [doi]
• Data preparation and entry for computer-aided mappingBernard Schechter. 48-52 [doi]
• CAMRAS: Computer Assisted Mapping & Records Activity SystemsWilliam L. Bathke. 53 [doi]
• File format for data exchange between graphic data basesArthur G. Gross. 54-59 [doi]
• An approach to gate assignment and module placement for printed wiring boardsIkuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Isao Shirakawa, Hiroshi Ozaki. 60-69 [doi]
• Pin assignment on a printed circuit boardLeah Mory-Rauch. 70-73 [doi]
• Implementation of an interactive printed circuit design systemKim R. Stevens, William M. van Cleemput, Tom C. Bennett, Jon A. Hupp. 74-81 [doi]
• A multi-pass, multi-algorithm approach to PCB routingRobert S. Fisher. 82-91 [doi]
• A topologically based non-minimum distance routing algorithmMichel T. Doreau, Luther C. Abel. 92-99 [doi]
• Fast maze routerJirí Soukup. 100-102 [doi]
• A test methodology for large logic networksGary H. Stange. 103-109 [doi]
• Selective controllability: A proposal for testing and diagnosisFrank C. Hsu, Peter Solecky, Lubomyr M. Zobniw. 110-116 [doi]
• A unified approach to test data analysisMichael A. Gianfagna. 117-124 [doi]
• A notation and system for 3-D constructionsChris I. Yessios. 125-132 [doi]
• The three-dimensional graphical input method for architectureHarvey C. Allison, Donald P. Greenberg. 133-137 [doi]
• Representation and generation of rectangular dissectionsUlrich Flemming. 138-144 [doi]
• BUBBLE: Relationship diagrams using iterative vector approximationGilles Fortin. 145-151 [doi]
• Interactive space layout: A graph theoretical approachJulia Ruch. 152-157 [doi]
• Multisource illumination & shadowingK. S. Andonian, S. Toida. 158-163 [doi]
• An experiment in architectural instructionRobert W. Dvorak. 164-166 [doi]
• The design of a data base organization for an electronic equipment DA systemIetoshi Kawano, Hiroshi Fukushima, Takeshi Numata. 167-175 [doi]
• Generalized translation in a data base systemClaude Frasson. 176-181 [doi]
• An Interactive Graphics System for the design of integrated circuitsBeatriz Infante, Diane Bracken, Bill McCalla, Sam Yamakoshi, Ellis Cohen. 182-187 [doi]
• ICARUS: An interactive integrated circuit layout programDouglas G. Fairbairn, James A. Rowson. 188-192 [doi]
• Versatile mask generation techniques for custom microelectronic devicesRobert P. Larsen. 193-198 [doi]
• A color graphics system for I.C. mask design and analysisNeil Weste. 199-205 [doi]
• Methods for hierarchical automatic layout of custom LSI circuit masksBryan Preas, Charles W. Gwyn. 206-212 [doi]
• Register-transfer level digital design automation: The allocation processLouis J. Hafer, Alice C. Parker. 213-219 [doi]
• A technology-relative computer-aided design system: Abstract representations, transformations, and design tradeoffsEdward A. Snow, Daniel P. Siewiorek, Donald E. Thomas. 220-226 [doi]
• Computer aided design of microprocessor-based systemsAlan A. Ross, Herschel H. Loomis Jr.. 227-230 [doi]
• Phoenix system overviewA. Frederick Rosene. 231 [doi]
• Phoenix architectureJohn Roder. 232 [doi]
• Programmers workbench, unix and documentationDale Smith. 233 [doi]
• Circuit design aids on unixAlexander G. Fraser. 234 [doi]
• FORMPLOT - a forms design systemDavid V. Moffat. 235-239 [doi]
• Logic design automation of MOS combinational networks with fan-in, fan-out constraintsYacoub M. El-Ziq. 240-249 [doi]
• LORES - Logic Reorganization SystemShunichiro Nakamura, Shinichi Murai, Chiyoji Tanaka, Masayuki Terai, Hideo Fujiwara, Kozo Kinoshita. 250-260 [doi]
• Interactive specification of structured designsAndreas Bechtolsheim. 261-263 [doi]
• Design verification and performance analysisMarvin A. Wold. 264-270 [doi]
• SCALD: Structured Computer-Aided Logic DesignThomas M. McWilliams, Lawrence C. Widdoes Jr.. 271-277 [doi]
• The SCALD physical design subsystemThomas M. McWilliams, Lawrence C. Widdoes Jr.. 278-284 [doi]
• Design rule verification based on one dimensional scansPhilip S. Wilcox, H. Rombeek, D. M. Caughey. 285-289 [doi]
• Automated techniques for product-grading systems designBelur V. Dasarathy. 290-296 [doi]
• A computer graphic human figure system applicable to kineseologyWilliam Fetter. 297 [doi]
• On the optimum two-dimensional allocation problemMurray J. Haims. 298-304 [doi]
• A synthesis rule for concurrent systemsTilak Agerwala, Yong-Chai Choed-Amphai. 305-311 [doi]
• Guiding sensitization searches using problem reduction graphsBen Huey. 312-320 [doi]
• SIGMA-CAD: Some new concepts in design of general purpose CAD systemsBertrand T. David, G. Vitry. 321-325 [doi]
• A testing strategy for PLAsCharles W. Cha. 326-334 [doi]
• EBT: A comprehensive test generation technique for highly sequential circuitsRalph Marlett. 335-339 [doi]
• Functional simulation and fault diagnosisMiroslaw Malek, Ajoy K. Bose. 340-346 [doi]
• Automatic System Level Test Generation and Fault Location for Large Digital SystemsAkihiko Yamada, Nobuo Wakatsuki, T. Fukui, Shigehiro Funatsu. 347-352 [doi]
• CADMON: Improving the CAD system human interfaceH. Eisenberg. 353-358 [doi]
• DAS: An automated system to support design analysisRonald R. Willis. 359-365 [doi]
• How to develop module logic using pseudo-code and stepwise refinementAnthony A. Lekkos, Carl M. Peters. 366-370 [doi]
• Automating the software design process by means of software design and documentation languageHenry Kleine. 371-379 [doi]
• ASCE Avionic System Configuration EvaluationJoe Clema, Stephen Zissos. 380-385 [doi]
• Multi-sim, a dynamic multi-level simulatorRobert C. Chen, James E. Coffman. 386-391 [doi]
• SALOGS-IV-A program to perform logic simulation and fault diagnosisGlenn R. Case, Jerry D. Stauffer. 392-397 [doi]
• Accurate simulation of flip-flop timing characteristicsDavid J. Evans. 398-404 [doi]
• A high performance delay calculation software system for MOSFET digital logic chipsAnts Koppel, Siddharth Shah, Prem Puri. 405-417 [doi]
• A module level simulation technique for systems composed of LSI's and MSI'sMario Tokoro, Masayuki Sato, Masayuki Ishigami, Euji Tamura, Terunobu Ishimitsu, Hisashi Ohara. 418-427 [doi]
• LSI components modelling in a three-valued functional simulationGiuseppe Alia, P. Ciompi, Enrico Martinelli, F. Bernardini. 428-438 [doi]
• Dynamic and deductive fault simulationA. Miara, Norbert Giambiasi. 439-443 [doi]
• Classification of PCB types for cost effective solutionsJerry T. Harvel. 444-445 [doi]
• A minicomputer based Interactive Graphics System as used for electronic design and automationPhilippe Villers. 446-453 [doi]
• The design of a dense PCB using an interactive DA systemDavid Raeger. 454 [doi]
• Software ManufacturingLawrence Bernstein, Christine M. Yuhas. 455-462 [doi]
• Topics in design automation data basesDan C. Nash. 463-474 [doi]
• Structured design methodologiesGlenn D. Bergland. 475-493 [doi]