Giuseppe Alia - researchr alias

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Viewing Publication 1 - 18 from 18

2011

A high performance ROM-based structure for modular exponentiationGiuseppe Alia, Enrico Martinelli. cee, 37(3):275-284, 2011. [doi]

2005

NEUROM: a ROM based RNS digital neuronGiuseppe Alia, Enrico Martinelli. NN, 18(2):179-189, 2005. [doi]

2002

Fast modular exponentiation of large numbers with large exponentsGiuseppe Alia, Enrico Martinelli. jsa, 47(14-15):1079-1088, 2002. [doi]

1998

Logic Design of a Fast Circuit for Iterative Additions in Redundant HybridGiuseppe Alia, Enrico Martinelli. cj, 41(1):45-51, 1998.

Sign detection in residue arithmetic unitsGiuseppe Alia, Enrico Martinelli. jsa, 45(3):251-258, 1998. [doi]

1993

On the Lower Bound to the VLSI Complexity of Number Conversion from Weighted to Residue RepresentationGiuseppe Alia, Enrico Martinelli. TC, 42(8):962-967, 1993.

1991

A VLSI Modulo m MultiplierGiuseppe Alia, Enrico Martinelli. TC, 40(7):873-878, 1991.

1990

A VLSI structure for::::X::::(mod::::m::::) operationGiuseppe Alia, Enrico Martinelli. vlsisp, 1(4):257-264, 1990. [doi]

VLSI Binary-Residue Converters for Pipelined ProcessingGiuseppe Alia, Enrico Martinelli. cj, 33(5):473-475, 1990.

1986

Fast hardware graphic generators of curve familiesGiuseppe Alia, Enrico Martinelli, N. Tani. cg, 10(1):27-36, 1986. [doi]

1985

Table Look-up Graphlc Interpolat ionGiuseppe Alia, Ferruccio Barsi, Enrico Martinelli, N. Tani. eurographics 1985: [doi]

1984

A Fast VLSI Conversion Between Binary and Residue SystemsGiuseppe Alia, Ferruccio Barsi, Enrico Martinelli. ipl, 18(3):141-145, 1984.

A fast near optimum VLSI implementation of FFT using residue number systemsGiuseppe Alia, Ferruccio Barsi, Enrico Martinelli. integration, 2(2):133-147, 1984. [doi]

An Approach to the Design of Hardware Curve Generators for Graphic DisplaysGiuseppe Alia, Enrico Martinelli, N. Tani. eurographics 1985: [doi]

1983

VLSI systolic arrays for band matrix multiplicationGiuseppe Alia. integration, 1(2-3):233-249, 1983. [doi]

1982

On switching network functionalities and their relationshipsGiuseppe Alia, Enrico Martinelli. ijpp, 11(2):123-138, 1982. [doi]

1978

LSI components modelling in a three-valued functional simulationGiuseppe Alia, P. Ciompi, Enrico Martinelli, F. Bernardini. dac 1978: 428-438 [doi]

1974

An approach to optimal partitioning of hypergraphsGiuseppe Alia, Piero Maestrini. acm 1974: 133-139 [doi]

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