Shengjia Shao, Shouyi Yin, Leibo Liu, Shaojun Wei. Map-reduce inspired loop parallelization on CGRA. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 1231-1234, IEEE, 2014. [doi]
Abstract is missing.