Map-reduce inspired loop parallelization on CGRA

Shengjia Shao, Shouyi Yin, Leibo Liu, Shaojun Wei. Map-reduce inspired loop parallelization on CGRA. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 1231-1234, IEEE, 2014. [doi]

Authors

Shengjia Shao

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Shouyi Yin

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Leibo Liu

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Shaojun Wei

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