Takeshi Kumaki - researchr alias

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Viewing Publication 1 - 33 from 33

2022

Implementation of AI characteristic motion detecting for improper-photography prevention systemYusuke Inoue, Xiangbo Kong, Takeshi Kumaki. isocc 2022: 201-202 [doi]

Development and evaluation of the "Stego-panel IV" Invisible information lighting displayYuta Moritake, Ryuya Kirihara, Yuki Hirota, Takumi Hayashi, Xiangbo Kong, Takeshi Kumaki. mwscas 2022: 1-4 [doi]

2021

Development of invisible information lighting display "Stego-panel IV"Yuta Moritake, Yutaro Shimomura, Ryuya Kirihara, Yuki Hirota, Xiangbo Kong, Takeshi Kumaki. gcce 2021: 73-74 [doi]

A Study on Specific Emitter Identification Using Modified Allan Variance and Correlation CoefficientYan Zhu, Sei Arima, Ryo Hirayama, Masaaki Kobayashi, Takeshi Kumaki. gcce 2021: 505-506 [doi]

2020

Acceleration of arithmetic processing with CAM-based massive-parallel SIMD matrix coreKyosuke Kageyama, Kensuke Watanabe, Akimitsu Hamai, Takeshi Kumaki, Tetsushi Koide. mwscas 2020: 486-489 [doi]

Live Demonstration: Development of LED-Based Stego-Panel for New Smartphone UsageYutaro Shimomura, Takuya Shimada, Ryuya Kirihara, Takeshi Kumaki. iscas 2020: 1 [doi]

2019

Structuring Element-counting Approach for Morphological Pattern Spectrum-based Image Manipulation DetectionKyosuke Kageyama, Takeshi Kumaki, Tetsushi Koide. isdcs 2019: 1-4 [doi]

Distributed Embedding Approach for Max-Plus Algebra-Based Morphological Wavelet Transform WatermarkingTakeshi Kumaki, Tomohiro Fujita, Takeshi Ogura, P. S. Venugopala. newcas 2019: 1-4 [doi]

2017

Hierarchical-Masked Image Filtering for Privacy-ProtectionTakeshi Kumaki, Takeshi Fujino. ieicet, 100-D(10):2327-2338, 2017. [doi]

2015

2014

2013

A CAM-Based Separated BTB for a Superscalar ProcessorKosaku Fukuda, Lin Meng, Takeshi Kumaki, Takeshi Ogura. ic-nc 2013: 385-388 [doi]

Hierarchical image-scrambling method with scramble-level controllability for privacy protectionToshiya Honda, Yuma Murakami, Yuki Yanagihara, Takeshi Kumaki, Takeshi Fujino. mwscas 2013: 1371-1374 [doi]

Cipher-destroying and secret-key-emitting hardware Trojan against AES coreTakeshi Kumaki, Masaya Yoshikawa, Takeshi Fujino. mwscas 2013: 408-411 [doi]

Development of effective information-hiding method for embedded systemsKei Nakao, Kohei Hozumi, Takeshi Kumaki, Takeshi Ogura, Takeshi Fujino. mwscas 2013: 1298-1301 [doi]

Evaluation of advanced pixel-level snakes on cellular hardware platformMatsui Takao, Tomohiro Fujita, Tsuji Yuji, Takeshi Kumaki, Mamoru Nakanishi, Takeshi Ogura. newcas 2013: 1-4 [doi]

2011

2010

A scalable massively parallel processor for real-time image processingTakashi Kurafuji, Masaru Haraguchi, Masami Nakajima, Takayuki Gyohten, Tetsu Nishijima, Hiroyuki Yamasaki, Yuta Imai, Masakatsu Ishizaki, Takeshi Kumaki, Yoshihiro Okuno, Tetsushi Koide, Hans Jürgen Mattausch, Kazutami Arimoto. isscc 2010: 334-335 [doi]

2008

Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia ProcessorTakeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Takayuki Gyohten, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito. ieicet, 91-C(9):1409-1418, 2008. [doi]

2007

Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable MemoryTakeshi Kumaki, Yutaka Kono, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch. ieicet, 90-D(1):346-354, 2007. [doi]

Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing EngineTakeshi Kumaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito. iscas 2007: 525-528 [doi]

Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix ProcessorTakeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito. ieicet, 90-D(8):1312-1315, 2007. [doi]

Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table OptimizerTakeshi Kumaki, Yasuto Kuroda, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito. ieicet, 90-D(1):334-345, 2007. [doi]

2006

Application of Multi-ported CAM for Parallel CodingTakeshi Kumaki, Y. Kouno, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch. apccas 2006: 1859-1862 [doi]

A flexible multiport content-addressable memoryTakeshi Kumaki, Keisuke Iwai, Takakazu Kurokawa. scjapan, 37(11):57-67, 2006. [doi]

2005

CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]Takeshi Kumaki, Yasuto Kuroda, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito. iscas 2005: 5202-5205 [doi]

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2005

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