Table of Contents

• Two-Fold Noise-Cancelling Low-Noise Amplifier in 28-nm CMOSAmir Bozorg, Robert Bogdan Staszewski. 1-4 [doi]
• Efficient Hardware Implementation of Incremental Learning and Inference on ChipGhouthi B. Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel. 1-4 [doi]
• Dark Count Rate Modeling in Single-Photon Avalanche Diodes for Space LIDAR ApplicationsAymeric Panglosse, Philippe Martin-Gonthier, Olivier Marcelot, Cédric Virmontois, Olivier Saint-Pé, Pierre Magnan. 1-4 [doi]
• 3A Fault Tolerant Low Side Driver Circuit Design Using Design FMEA for Automotive ApplicationsSri Navaneeth Easwaran, Martin Mollat, Deepak Sreedharan, Samir Camdzic, Sunil Venugopal Kashvap, Robert Weigel. 1-4 [doi]
• Data-Transition Decision Feedback Equalizer with Edge-Emphasis Taps and Raised ReferencesYue Li, Fei Yuan. 1-4 [doi]
• Design of A D-band Transformer-Based Neutralized Class-AB Power Amplifier in Silicon TechnologiesXinyan Tang, Alaaeldien Medra, Johan Nguyen, Khaled Khalaf, Björn Debaillie, Piet Wambacq. 1-4 [doi]
• Random Number Generator Based on Micro-Scale Bio-electrochemical Cell SystemCelal Erbay, Salih Ergün. 1-4 [doi]
• Electronic System Level Design of Heterogeneous Systems: a Motor Speed Control System Case StudyBreytner Fernández-Mesa, Liliana Andrade, Frédéric Pétrot. 1-4 [doi]
• A 1.9-µW 7-GHz IR-UWB Transmitter with RF-Energy-Harvester in 180-nm CMOS for Battery-Less Bio-SensorsStefan Schmickl, Thomas Faseth, Harald Pretl. 1-4 [doi]
• Exploring the Training and Execution Acceleration of a Neural Network in a Reconfigurable General-purpose Processor for Embedded SystemsGrégory Calegari Marchesan, Everton Alceu Carara, Marcelo Serrano Zanetti, Leonardo Londero de Oliveira. 1-4 [doi]
• A 22-29 GHz Voltage-Biased LC-VCO with Suppressed Flicker Noise over Tuning Range in 22nm FD-SOIZhiwei Zong, Giovanni Mangraviti, Piet Wambacq. 1-4 [doi]
• Nonlinearity Modeling of Chireix Outphasing Power Combiner Under Amplitude ImbalancePavel Afanasyev, Prasidh Ramabadran, Ronan Farrell, John Dooley. 1-4 [doi]
• Going from a 5G Vision to real ImplementationFredrik Tillman, Sven Mattisson. 1-4 [doi]
• Multi-step capacitor switching scheme for low-power SAR ADCAleksandr Gusev, Dmitry Osipov 0001, Steffen Paul. 1-4 [doi]
• Designing Mixed-Signal PLLs regarding Multiple Requirements taking Non-Ideal Effects into AccountChristian Hangmann, Christian Hedayat, Ulrich Hilleringmann. 1-4 [doi]
• A 2.8 pJ/bit 10 Gb/s Delayed-Phase-Select 2-bit Pulsewidth Modulator in 45-nm SOI CMOSSami Ur Rehman, Ali Ferchichi, Mohammad Mahdi Khafaji, Corrado Carta, Frank Ellinger. 1-4 [doi]
• A 0.8 V Low-Power 3rd order Sigma-Delta Modulator in 22 nm FDSOI CMOS Process for Sensor InterfacesPragoti Pran Bora, David Borggreve, Frank Vanselow, Erkan Isa, Linus Maurer. 1-4 [doi]
• Analysis of Random Number Generators Based on Fibonacci-Galois Ring OscillatorsKaya Demir, Salih Ergün. 1-4 [doi]
• A 900-MHz 1.25-dB Noise-Figure Differential-Output LNA with 12.5 dB/mW FoMAtul Thakur, Sweta Agarwal, Shouri Chatterjee. 1-4 [doi]
• A 2.5GHz LTE Doherty Power Amplifier in SOI-CMOS TechnologyAlexandre Giry, E. Mercier, Ayssar Serhan, D. Parat, P. Reynier, R. Berro, R. Mourot, C. De Ranter, P. Indirayanti, M. Borremans. 1-4 [doi]
• GCoL - A General Co-simulator Applied to Wireless Sensor Networks and RTL DesignGrégory Calegari Marchesan, Everton Alceu Carara, Crístian Müller, Leonardo Londero de Oliveira. 1-4 [doi]
• 28 GHz Quadrature Frequency Generation Exploiting Injection-Locked Harmonic Extractors for 5G CommunicationsZhong Gao, Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski. 1-4 [doi]
• 2 6-bit Fully-Standard-Cell-Based Synthesizable SAR ADC in 65 nm CMOSNaoki Ojima, Zule Xu, Tetsuya Iizuka. 1-4 [doi]
• A Low-Complex Compressive Sensing Based Thermal Sensor Placement for Multicore SystemsKun-Chih Chen, Hsueh-Wen Tang. 1-4 [doi]
• A Cell-Based Wide-Frequency-Range DLL Supporting Fast Frequency ScalingWei Chu, Shi-Yu Huang. 1-4 [doi]
• Wireless Capsule Endoscopic Image Enhancement Method Based on Histogram Correction and Unsharp Masking in Wavelet DomainMingzhu Long, Xiang Xie, Guolin Li, Zhihua Wang. 1-4 [doi]
• A 34-fJ/bit 20-Gb/s 1/8-rate Charge-Steering DFE for IoT ApplicationsMarco A. Saif, Khaled M. Hassan, Ahmed Abdelati, Sameh A. Ibrahim. 1-4 [doi]
• A Novel Offset and 1/f Noise Compensated Single-Slope ADC with Reduced Hardware EffortLukas Straczek, Furkan Ercan, Jürgen Oehm. 1-4 [doi]
• The Probabilistic Finite Alphabet Iterative Decoder for Low-Density Parity-Check CodesFakhreddine Ghaffari, Khoa Le, David Declercq. 1-4 [doi]
• Physically-Derived 3-Box Power Amplifier ModelElias Soleiman, Dang-Kièn Germain Pham, Chadi Jabbour, Patricia Desgreys, Mahmoud Kamarei. 1-4 [doi]
• An Ultra Low-power Low-offset Double-tail ComparatorAta Khorami, Roghayeh Saeidi, Mohammad Sharifkhani, Nima Taherinejad. 1-4 [doi]
• DoA Estimation Using Reconfigurable Antennas in Millimiter-Wave Frequency 5G SystemsMateusz Rzymowski, K. Trzebiatowski, Krzysztof Nyka, Lukasz Kulas. 1-4 [doi]
• A Capacitor-Less CMOS Neuron Circuit for Neuromemristive NetworksHassen Aziza, M. Moreau, A. Perez, Arnaud Virazel, P. Girard. 1-4 [doi]
• A Tri-level Current-Steering DAC Design with Improved Output-Impedance Related Dynamic PerformanceShantanu Mehta, Anthony G. Scanlan, Brendan Mullane, Daniel O'Hare. 1-4 [doi]
• Accurate and Efficient Interdependent Timing Model for Flip-Flop in Wide Voltage RegionPeng Cao 0002, Zhiyuan Liu 0011, Jingjing Guo, Haoyu Pang, Jiangping Wu, Jun Yang 0006. 1-4 [doi]
• High-Level Availability Analysis of FPGA-Based Time-Sensitive NetworksAyman A. Atallah, Ghaith Bany Hamad, Otmane Aït Mohamed, Mounir Boukadoum. 1-4 [doi]
• Integrated multipurpose analog front-end for electrochemical ISFET sensorsMarkus Hefele, Ernst Müllner, Ralf Brederlow, Andreas Lösel, Sebastian Meier, Christian Pfeffer, Franz Kreupl, Bernhard Wolf. 1-4 [doi]
• Towards accurate camera-less eye tracker using instrumented contact lensLoïc Massin, Cyril Lahuec, Vincent Nourrit, Fabrice Seguin, Jean-Louis de Bougrenet. 1-4 [doi]
• A Robust Random Number Generator Based on Chaotic Ring OscillatorsIbrahim Tastan, Salih Ergün. 1-4 [doi]
• Design of a 28 GHz differential GaAs power amplifier with capacitive neutralization for 5G mmwave applicationsDongyang Yan, Mark Ingels, Giovanni Mangraviti, Yao Liu, Bertrand Parvais, Niamh Waldron, Nadine Collaert, Piet Wambacq. 1-4 [doi]
• SORN Arithmetic for MIMO Symbol Detection - Exploration of the Type-2 Unum FormatMoritz Bärthel, Pascal Seidel, Jochen Rust, Steffen Paul. 1-4 [doi]
• Fractional-Order Asymptotical Phase Shifter with Flat Magnitude ResponseRoman Sotner, Lukas Langhammer, Jan Jerabek, Tomás Dostál. 1-4 [doi]
• Using Meta-heuristic Optimization to Extract Bio-impedance Parameters from an Oscillator CircuitMenna Mohsen, Lobna A. Said, Ahmed H. Madian, Ahmed S. Elwakil, Ahmed G. Radwan. 1-4 [doi]
• An Ultra-Broad-Band Low-Distortion High-Efficiency Class-D Power Amplifier in 130nm CMOS TechnologyAhmed Mamdouh, Mohamed M. Aboudina, Faisal Hussien, Ahmed Nader Mohieldin. 1-4 [doi]
• Systematic Design of On-Chip Matching Networks for D-band CircuitsJohan Nguyen, Xinyan Tang, Khaled Khalaf, Björn Debaillie, Piet Wambacq. 1-4 [doi]
• An UWB 18.5 GS/s Sampling Front-End for a 74 GS/s 5-bit ADC in 22nm FDSOINima Lotfi, Friedel Gerfers. 1-4 [doi]
• ISI Sensitivity of PAM Signaling for Very High-Speed Short-Reach Copper LinksFirat Celik, Ayca Akkaya, Armin Tajalli, Yusuf Leblebici. 1-4 [doi]
• Exploring Motion Vector Cost with Partial Distortion Elimination in Sum of Absolute Differences for HEVC Integer Motion EstimationBrunno Abreu, Mateus Grellert, Guilherme Paim, Thomas Fontanari, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sergio Bampi. 1-4 [doi]
• Ultra Low Latency Implementation of Robust Channel Estimation and Equalization for Industrial Wireless Communication SystemsLudwig Karsthof, Mingjie Hao, Jochen Rust, Steffen Paul. 1-4 [doi]
• Efficient Arbitrary Sample Rate Conversion for Multi-Standard Digital Front-EndsAli Zeineddine, Stéphane Paquelet, Amor Nafkha, Pierre-Yves Jezequel, Christophe Moy. 1-4 [doi]
• A 300MS/s 10bit SAR with loop-embedded input buffer for a photonic systemLeonhard Klein, Antonios Nikas, Bijoy Kundu, Matthias Völker. 1-4 [doi]
• MAGIC: A Wear-leveling Circuitry to Mitigate Aging Effects in Sense Amplifiers of SRAMsAlexandra Listl, Daniel Mueller-Gritschneder, Ulf Schlichtmann. 1-4 [doi]
• Enhanced Symbol Synchronization for Multi-User High Reliable Dynamic Industrial Wireless CommunicationMingjie Hao, Ludwig Karsthof, Jochen Rust, Steffen Paul. 1-4 [doi]
• A 15 - 34 GHz Robust GaN based Low-Noise Amplifier with 0.8dB Minimum Noise FigureShiyong Zhang, Penghui Zheng, Jianxing Xu, Rong Wang, Yang Huang, Xiaodong Tong. 1-4 [doi]
• Idols with Feet of Clay: On the Security of Bootloaders and Firmware Updaters for the IoTLionel Morel, Damien Couroussé. 1-4 [doi]
• Wirelessly-Powered Printed Temperature Sensor with an Ultra-Low-Power and High-Sensitivity CMOS Readout ICShao-Yung Lu, I-Feng Wu, Ying-Chih Liao, Yu-Te Liao. 1-4 [doi]
• Shared wireless link co-design for implantable device with far-field wireless power transferVitor F. Silva, Hugo Dinis, Paulo. M. Mendes. 1-4 [doi]
• Adaptive Bivariate Function Generation based on Chebyshev-PolynomialsJochen Rust, Pascal Seidel, Steffen Paul. 1-4 [doi]
• An RNN-based Speech Enhancement Method for a Binaural Hearing Aid SystemZhuoyi Sun, Yingdan Li, Hanjun Jiang, Zhihua Wang. 1-4 [doi]
• A Semi-Serial Topology for Compact and Fast IMPLY-based Memristive Full AddersNima Taherinejad, T. Delaroche, David Radakovits, Shahriar Mirabbasi. 1-4 [doi]
• On the Confidence in Bit-Alias Measurement of Physical Unclonable FunctionsFlorian Wilde, Michael Pehl. 1-4 [doi]
• Inductive Locating Method to Locate Miniaturized Wireless Sensors within Inhomogeneous DielectricsSven Lange, Dominik Schröder, Christian Hedayat, Thomas Otto, Ulrich Hilleringmann. 1-4 [doi]
• Using deep learning approaches to overcome limited dataset issues within semiconductor domainMilad Omrani Tamrin, Sébastien Henwood, Jean-François Dubois, Jean-Jules Brault, Saad Chidami, Samuel-Jean Bassetto. 1-4 [doi]
• FIR Feedback in Continuous- Time Incremental Sigma-Delta ADCsAyman Mohamed, Ayman Sakr, Jens Anders. 1-4 [doi]
• New Design Opportunities exploiting FDSOI technology for RF Power Amplifier and LNA designFrédéric Hameau, Jennifer Zaini, Thierry Taris, Dominique Morche, Baudouin Martineau, Patrick Audebert. 1-4 [doi]
• High-efficiency LED Driver for Short Fluorophores Lifetime Biosensing ApplicationsIsam Gharib, Mohamad Sawan. 1-4 [doi]
• All-Digital Phase-Locked Loop Arrays: Investigation of Synchronisation and Jitter Performance through FPGA PrototypingEugene Koskin, Pierre Bisiaux, Dimitri Galayko, Elena Blokhina. 1-4 [doi]
• µW Pre-processing Unit for Virtual Sensors Based on Tri-axial Smart AccelerometersAntonio De Vita, Gian Domenico Licciardo, Aldo Femia, Luigi Di Benedetto, Danilo Pau. 1-4 [doi]
• Substrate Coupling in a Fully Integrated Three-State High Voltage InverterKatrin Hirmer, Klaus Hofmann. 1-4 [doi]
• A 0.93 pJ/bit Controlled Capacitor-Charge 2-bit Pulsewidth Demodulator in 45-nm RFSOI CMOSSami Ur Rehman, Mohammad Mahdi Khafaji, Ali Ferchichi, Corrado Carta, Frank Ellinger. 1-4 [doi]
• Cryptography by Synchronization of Hopfield Neural Networks that Simulate Chaotic Signals Generated by the Human BodyElias de Almeida Ramos, João Carlos Britto Filho, Ricardo A. L. Reis. 1-4 [doi]
• Low Complexity Architecture of N-Path Mixers for Low Power ApplicationA. Al Shakoush, Estelle Lauga-Larroze, Serge Subias, Thierry Taris, F. Podevin, Sylvain Bourdel. 1-4 [doi]
• Estimating the Unknown Parameters of a Random Number Generator Based on a Chaotic Jerk SystemSalih Ergüm. 1-4 [doi]
• Challenges in Statistical Analysis: Yesterday, Today, and Tomorrow: (Invited Paper)Michael Pronath. 1-4 [doi]
• Energy Savings with Non-Volatile Memory System for High Definition Video EncodersDieison Soares Silveira, Ana Mativi, Marcelo Schiavon Porto, Sergio Bampi. 1-4 [doi]
• Fault Attacks on Cryptographic CircuitsIlia Polian. 1-4 [doi]
• Pseudo-Continuous Flow System for Dopamine and Ascorbic Acid Detection Based on FTIR-SpectrometeryHamza Landari, Mourad Roudjane, Younès Messaddeq, Amine Miled. 1-4 [doi]
• Self-Calibrating Digital-to-Time Converter in CMOS for Advanced Control in Smart Gate DriversEva Schulte Bocholt, Leo Rolff, Ralf Wunderlich, Stefan Heinen. 1-4 [doi]
• CMOS Amplifier Design Based on Extended $g_{m}/I_{D}$ MethodologyAmin Aghighi, Jacob Atkinson, Nickolas Bybee, Stuart Anderson, Mitchell Crane, Anthony Bailey, Reuben Morell, Ahmed Hassanin, Armin Tajalli. 1-4 [doi]
• CDM-based 4-Channel Digital Beamforming Transmitter Using a Single DACAmit Sangwan, Kuriyama Tasuku, Kihira Kazunari, Toru Fukasawa, Rui Ma, Bingnan Wang, Kyeong Kim, Kieran Parsons, Toshiaki Koike-Akino, Pu Wang, Philip V. Orlik, Koon Hoo Teo. 1-4 [doi]
• MoNA: Mobile Neural Architecture with Reconfigurable Parallel DimensionsWeiwei Wu, Shouyi Yin, Fengbin Tu, Leibo Liu, Shaojun Wei. 1-4 [doi]
• Optimization of a pruned 2-D Digital Predistortion Model Structure for Power Amplifiers LinearizationSiqi Wang, Morgan Roger, Caroline Lelandais-Perrault. 1-4 [doi]
• A 0.5-V 180-nm CMOS Switched-Capacitor Temperature Sensor with 319 nJ/measurementMarkus Stadelmayer, Thomas Faseth, Harald Pretl. 1-4 [doi]
• Power-Gating Models for Rapid Design ExplorationDustin Peterson, Oliver Bringmann 0001. 1-4 [doi]
• Construction of Delay-Driven GNR Routing TreeJin-Tai Yan, Chia-Heng Yen. 1-4 [doi]
• Distributed Embedding Approach for Max-Plus Algebra-Based Morphological Wavelet Transform WatermarkingTakeshi Kumaki, Tomohiro Fujita, Takeshi Ogura, P. S. Venugopala. 1-4 [doi]
• New Analytical Boundary Condition for Optimized Outphasing PA DesignJoe Bachi, Ayssar Serhan, Dang-Kièn Germain Pham, Patricia Desgreys, Alexandre Giry. 1-4 [doi]
• Exploring Schmitt Trigger Circuits for Process Variability MitigationL. B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Augusto da Luz Reis. 1-4 [doi]
• Maximizing the Power-Efficiency of the Approximate Pruned Modified Rounded DCT Exploiting Approximate Adder CompressorsGuilherme Paim, Leandro M. G. Rocha, Eduardo Antônio César aa Costa, Sergio Bampi. 1-4 [doi]
• Design and validation of a six-antenna WPT system with tracking capabilites for biomedical devicesHugo Dinis, Ivo Colmiais, Paulo. M. Mendes. 1-4 [doi]
• Activated Current Sensing Circuit for Resistive Neuromorphic NetworksMohammed E. Fouda, Ahmed M. Eltawil, Fadi J. Kurdahi. 1-4 [doi]
• A Comparison of Frequency Synthesizers Up to 25 GHz for 130 nm CMOS ImplementationZakaria El Alaoui Ismaili, Wessam Ajib, François Gagnon, Mounir Boukadoum. 1-4 [doi]
• A Programmable Calculation Unit Employing Memcapacitor-based Neuromorphic CircuitYan Chen, Jing Zhang, Yingjie Zhang, Renyuan Zhang, Mutsumi Kimura, Yasuhiko Nakashima. 1-4 [doi]
• A Verilog-A Model of the Shuttle of an Electron in a Two Quantum-Dot SystemImran Bashir, Panagiotis Giounanlis, Elena Blokhina, Dirk Leipold, Krzysztof Pomorski, Robert Bogdan Staszewski. 1-4 [doi]
• First Order Fully Passive Noise-Shaping SAR ADC Architecture with NTF Zero close to OneDmitry Osipov 0001, Aleksandr Gusev, Steffen Paul. 1-4 [doi]
• Generic Hardware of Fractional Order Multi-Scrolls Chaotic Generator Based on FPGAMerna Roshdy, Mohammed F. Tolba 0002, Lobna A. Said, Ahmed H. Madian, Ahmed G. Radwan. 1-4 [doi]
• Synthesis of Approximate Logic on Memristive CrossbarsSalman Anwar Khokhar, Amad Ul Hassen. 1-4 [doi]