A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetry

Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya. A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetry. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 177-180, IEEE, 2014. [doi]

Abstract

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