A 10Gb/s 44.2 dB adaptive equalizer with Duobinary tracking loop in 0.18µm CMOS

Po-Hsuan Chang, An-Siou Li, Chia-Ming Tsai. A 10Gb/s 44.2 dB adaptive equalizer with Duobinary tracking loop in 0.18µm CMOS. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 2133-2136, IEEE, 2014. [doi]

Abstract

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