Shift register multi-phase clock based downsampled floating tap DFE for serial links

Pervez M. Aziz, Hiroshi Kimura, Amaresh V. Malipatil, Shiva Kotagiri, Gordon Chan, Hairong Gao. Shift register multi-phase clock based downsampled floating tap DFE for serial links. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 2469-2472, IEEE, 2014. [doi]

Abstract

Abstract is missing.