High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design

Can Sitik, Leo Filippini, Emre Salman, Baris Taskin. High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014. pages 498-503, IEEE, 2014. [doi]

@inproceedings{SitikFST14,
  title = {High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design},
  author = {Can Sitik and Leo Filippini and Emre Salman and Baris Taskin},
  year = {2014},
  doi = {10.1109/ISVLSI.2014.53},
  url = {http://dx.doi.org/10.1109/ISVLSI.2014.53},
  researchr = {https://researchr.org/publication/SitikFST14},
  cites = {0},
  citedby = {0},
  pages = {498-503},
  booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014},
  publisher = {IEEE},
}