Performance-constrained pipelining of software loops onto reconfigurable hardware - researchr publication bibtex

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Greg Snider. Performance-constrained pipelining of software loops onto reconfigurable hardware. In FPGA. pages 177-186, 2002. [doi]

@inproceedings{Snider02,
  title = {Performance-constrained pipelining of software loops onto reconfigurable hardware},
  author = {Greg Snider},
  year = {2002},
  doi = {10.1145/503048.503075},
  url = {http://doi.acm.org/10.1145/503048.503075},
  researchr = {https://researchr.org/publication/Snider02},
  cites = {0},
  citedby = {0},
  pages = {177-186},
  booktitle = {FPGA},
}

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