Evaluating the robustness of secure triple track logic through prototyping - researchr publication authors

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Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert. Evaluating the robustness of secure triple track logic through prototyping. In Marcelo Lubaszewski, Michel Renovell, Rajesh K. Gupta, editors, Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008. pages 193-198, ACM, 2008. [doi]

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