Kyomin Sohn, Taesik Na, Indal Song, Yong Shim, Wonil Bae, Sanghee Kang, DongSu Lee, Hangyun Jung, Seok-Hun Hyun, Hanki Jeoung, Ki Won Lee, Jun-Seok Park, Jongeun Lee, ByungHyun Lee, Inwoo Jun, Juseop Park, Junghwan Park, Hundai Choi, Sanghee Kim, Haeyoung Chung, Young Choi, Dae-Hee Jung, Byungchul Kim, Jung Hwan Choi, Seong-Jin Jang, Chi-Wook Kim, Jung-Bae Lee, Joo-Sun Choi. A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme. J. Solid-State Circuits, 48(1):168-177, 2013. [doi]
@article{SohnNSSBKLJHJLPLLJPPCKCCJKCJKLC13,
title = {A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme},
author = {Kyomin Sohn and Taesik Na and Indal Song and Yong Shim and Wonil Bae and Sanghee Kang and DongSu Lee and Hangyun Jung and Seok-Hun Hyun and Hanki Jeoung and Ki Won Lee and Jun-Seok Park and Jongeun Lee and ByungHyun Lee and Inwoo Jun and Juseop Park and Junghwan Park and Hundai Choi and Sanghee Kim and Haeyoung Chung and Young Choi and Dae-Hee Jung and Byungchul Kim and Jung Hwan Choi and Seong-Jin Jang and Chi-Wook Kim and Jung-Bae Lee and Joo-Sun Choi},
year = {2013},
doi = {10.1109/JSSC.2012.2213512},
url = {http://dx.doi.org/10.1109/JSSC.2012.2213512},
researchr = {https://researchr.org/publication/SohnNSSBKLJHJLPLLJPPCKCCJKCJKLC13},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {48},
number = {1},
pages = {168-177},
}