Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process

Dinesh Somasekhar, Balaji Srinivasan, Gunjan Pandya, Fatih Hamzaoglu, Muhammad M. Khellah, Tanay Karnik, Kevin Zhang. Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process. J. Solid-State Circuits, 45(4):751-758, 2010. [doi]

@article{SomasekharSPHKKZ10,
  title = {Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process},
  author = {Dinesh Somasekhar and Balaji Srinivasan and Gunjan Pandya and Fatih Hamzaoglu and Muhammad M. Khellah and Tanay Karnik and Kevin Zhang},
  year = {2010},
  doi = {10.1109/JSSC.2010.2042253},
  url = {http://dx.doi.org/10.1109/JSSC.2010.2042253},
  researchr = {https://researchr.org/publication/SomasekharSPHKKZ10},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {45},
  number = {4},
  pages = {751-758},
}