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Javier Soto, Juan Manuel Moreno, Joan Cabestany. A self-adaptive hardware architecture with fault tolerance capabilities. Neurocomputing, 121:25-31, 2013. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Description of a Fault Tolerance System Implemented in a Hardware Architecture with Self-adaptive CapabilitiesJavier Soto, Juan Manuel Moreno, Joan Cabestany. iwann 2011: 557-564 [doi] Implementation of a Dynamic Fault-Tolerance Scaling Technique on a Self-Adaptive Hardware ArchitectureJ. Soto Vargas, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany. reconfig 2009: 445-450 [doi]
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