30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance

Samuel D. Spetalnick, Ashwin Sanjay Lele, Brian Crafton, Muya Chang, Sigang Ryu, Jong-Hyeok Yoon, Zhijian Hao, Azadeh Ansari, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury. 30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance. In IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024. pages 482-484, IEEE, 2024. [doi]

@inproceedings{SpetalnickLCCRYHAKCCR24,
  title = {30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance},
  author = {Samuel D. Spetalnick and Ashwin Sanjay Lele and Brian Crafton and Muya Chang and Sigang Ryu and Jong-Hyeok Yoon and Zhijian Hao and Azadeh Ansari and Win-San Khwa and Yu-Der Chih and Meng-Fan Chang and Arijit Raychowdhury},
  year = {2024},
  doi = {10.1109/ISSCC49657.2024.10454500},
  url = {https://doi.org/10.1109/ISSCC49657.2024.10454500},
  researchr = {https://researchr.org/publication/SpetalnickLCCRYHAKCCR24},
  cites = {0},
  citedby = {0},
  pages = {482-484},
  booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024},
  publisher = {IEEE},
  isbn = {979-8-3503-0620-0},
}