A Transistor-Level Probabilistic Approach for Reliability Analysis of Arithmetic Circuits With Applications to Emerging Technologies

Bodapati Srinivasu, K. Sridharan. A Transistor-Level Probabilistic Approach for Reliability Analysis of Arithmetic Circuits With Applications to Emerging Technologies. IEEE Transactions on Reliability, 66(2):440-457, 2017. [doi]

@article{SrinivasuS17,
  title = {A Transistor-Level Probabilistic Approach for Reliability Analysis of Arithmetic Circuits With Applications to Emerging Technologies},
  author = {Bodapati Srinivasu and K. Sridharan},
  year = {2017},
  doi = {10.1109/TR.2016.2642168},
  url = {https://doi.org/10.1109/TR.2016.2642168},
  researchr = {https://researchr.org/publication/SrinivasuS17},
  cites = {0},
  citedby = {0},
  journal = {IEEE Transactions on Reliability},
  volume = {66},
  number = {2},
  pages = {440-457},
}