Benno Stabernack, Jan Moller, Jan Hahlbeck, Jens Brandenburg. Demonstrating an FPGA implementation of a full HD real-time HEVC decoder with memory optimizations for range extensions support. In 2015 Conference on Design and Architectures for Signal and Image Processing, DASIP 2015, Krakow, Poland, September 23-25, 2015. pages 1-2, IEEE, 2015. [doi]
Abstract is missing.