Iakovos Stamoulis, Martin White, Paul F. Lister. Pipelined Floating Point Arithmetic Optimized for FPGA Architectures. In Patrick Lysaght, James Irvine, Reiner W. Hartenstein, editors, Field-Programmable Logic and Applications, 9th International Workshop, FPL 99, Glasgow, UK, August 30 - September 1, 1999, Proceedings. Volume 1673 of Lecture Notes in Computer Science, pages 365-370, Springer, 1999.
Abstract is missing.