Kleber Stangherlin, Manoj Sachdev. Design and Implementation of a Secure RISC-V Microprocessor. IEEE Trans. VLSI Syst., 30(11):1705-1715, 2022. [doi]
@article{StangherlinS22,
title = {Design and Implementation of a Secure RISC-V Microprocessor},
author = {Kleber Stangherlin and Manoj Sachdev},
year = {2022},
doi = {10.1109/TVLSI.2022.3203307},
url = {https://doi.org/10.1109/TVLSI.2022.3203307},
researchr = {https://researchr.org/publication/StangherlinS22},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {30},
number = {11},
pages = {1705-1715},
}