Riad Stefo, Jörg Schreiter, Jens-Uwe Schluessler, René Schüffny. High resolution ADPLL frequency synthesizer for FPGA-and ASIC-based applications. In Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, Tokyo, Japan, FPT 2003, December 15-17, 2003. pages 28-34, IEEE, 2003. [doi]
@inproceedings{StefoSSS03,
title = {High resolution ADPLL frequency synthesizer for FPGA-and ASIC-based applications},
author = {Riad Stefo and Jörg Schreiter and Jens-Uwe Schluessler and René Schüffny},
year = {2003},
doi = {10.1109/FPT.2003.1275728},
url = {http://dx.doi.org/10.1109/FPT.2003.1275728},
researchr = {https://researchr.org/publication/StefoSSS03},
cites = {0},
citedby = {0},
pages = {28-34},
booktitle = {Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, Tokyo, Japan, FPT 2003, December 15-17, 2003},
publisher = {IEEE},
}