Per Stenström. A Latency-Hiding Scheme for Multiprocessors with Buffered Multistage Networks. In Viktor K. Prasanna, Larry H. Canter, editors, Proceedings of the 6th International Parallel Processing Symposium, Beverly Hills, CA, USA, March 1992. pages 39-42, IEEE Computer Society, 1992.
@inproceedings{Stenstrom92,
title = {A Latency-Hiding Scheme for Multiprocessors with Buffered Multistage Networks},
author = {Per Stenström},
year = {1992},
researchr = {https://researchr.org/publication/Stenstrom92},
cites = {0},
citedby = {0},
pages = {39-42},
booktitle = {Proceedings of the 6th International Parallel Processing Symposium, Beverly Hills, CA, USA, March 1992},
editor = {Viktor K. Prasanna and Larry H. Canter},
publisher = {IEEE Computer Society},
isbn = {0-8186-2672-0},
}