Luca Sterpone. Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAs. In Jürgen Becker, Roger Woods, Peter M. Athanas, Fearghal Morgan, editors, Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings. Volume 5453 of Lecture Notes in Computer Science, pages 85-96, Springer, 2009. [doi]
@inproceedings{Sterpone09, title = {Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAs}, author = {Luca Sterpone}, year = {2009}, doi = {10.1007/978-3-642-00641-8_11}, url = {http://dx.doi.org/10.1007/978-3-642-00641-8_11}, tags = {rule-based}, researchr = {https://researchr.org/publication/Sterpone09}, cites = {0}, citedby = {0}, pages = {85-96}, booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings}, editor = {Jürgen Becker and Roger Woods and Peter M. Athanas and Fearghal Morgan}, volume = {5453}, series = {Lecture Notes in Computer Science}, publisher = {Springer}, isbn = {978-3-642-00640-1}, }