On the optimal reconfiguration times for TMR circuits on SRAM based FPGAs

Luca Sterpone, Anees Ullah. On the optimal reconfiguration times for TMR circuits on SRAM based FPGAs. In 2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013), Torino, Italy, June 24-27, 2013. pages 9-14, IEEE, 2013. [doi]

@inproceedings{SterponeU13,
  title = {On the optimal reconfiguration times for TMR circuits on SRAM based FPGAs},
  author = {Luca Sterpone and Anees Ullah},
  year = {2013},
  doi = {10.1109/AHS.2013.6604220},
  url = {http://dx.doi.org/10.1109/AHS.2013.6604220},
  researchr = {https://researchr.org/publication/SterponeU13},
  cites = {0},
  citedby = {0},
  pages = {9-14},
  booktitle = {2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013), Torino, Italy, June 24-27, 2013},
  publisher = {IEEE},
}