Uros Stevanovic, Michele Caselle, Suren Chilingaryan, A. Herth, Andreas Kopmann, Matthias Vogelgesang, M. Balzer, M. Weber. High-speed camera with embedded FPGA processing. In Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, DASIP 2012, Karlsruhe, Germany, October 23-25, 2012. pages 1-2, IEEE, 2012. [doi]
@inproceedings{StevanovicCCHKVBW12,
title = {High-speed camera with embedded FPGA processing},
author = {Uros Stevanovic and Michele Caselle and Suren Chilingaryan and A. Herth and Andreas Kopmann and Matthias Vogelgesang and M. Balzer and M. Weber},
year = {2012},
url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=6385417},
researchr = {https://researchr.org/publication/StevanovicCCHKVBW12},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, DASIP 2012, Karlsruhe, Germany, October 23-25, 2012},
publisher = {IEEE},
isbn = {978-1-4673-2089-4},
}