Abstract is missing.
- Sparsity-based real-time audio restorationPatrick Maechler, David E. Bellasi, Andreas Burg, Norbert Felber, Hubert Kaeslin, Christoph Studer. 1-2 [doi]
- FPGA implementation of mono and stereo inverse perspective mapping for obstacle detectionDiego A. Botero Galeano, Jonathan Piat, Pierre Chalimbaud, Michel Devy, Jean-Louis Boizard. 1-8 [doi]
- Investigating performance variations of an optimized GPU-ported granulometry algorithmVincent Boulos, Vincent Fristot, Dominique Houzet, Luc Salvo, Pierre Lhuissier. 1-6 [doi]
- Video surveillance application based on application specific vector processorsRoman Bartosinski, Martin Danek, Jaroslav Sykora, Lukas Kohout, Petr Honzík. 1-8 [doi]
- Application-specific instruction processor for extracting local binary patternsJani Boutellier, Ismo Lundbom, Janne Janhunen, Jori Ylimainen, Jari Hannuksela. 1-8 [doi]
- Impact of high level transforms on high level synthesis for motion detection algorithmH. Ye, Lionel Lacassagne, Daniel Etiemble, L. Cabaret, Joel Falcou, Andrés Romero, O. Florent. 1-8 [doi]
- Application of temporal decoupling to the creation of efficient performance models of automotive architecturesTakieddine Majdoub, Sébastien LeNours, Olivier Pasquier, Fabienne Nouvel. 1-8 [doi]
- FPGA prototyping of an ASIP LDPC decoder for the DVB-T2 standardBertrand Le Gal, Christophe Jégo. 1-2 [doi]
- Stereo depth map computation on a Tilera TILEPro64 embedded multicore processorTimo Schönwald, Alexander Koch, Benjamin Ranft, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel. 1-2 [doi]
- Architectural decomposition of video decoders for many core architecturesHenryk Richter, Benno Stabernack, Volker Kuhn. 1-8 [doi]
- A prototype of an invasive tightly-coupled processor arrayShravan Muddasani, Srinivas Boppu, Frank Hannig, Boris Kuzmin, Vahid Lari, Jürgen Teich. 1-2 [doi]
- Foreground detection and image segmentation in a flexible ASVP platform for FPGAsRoman Bartosinski, Martin Danek, Jaroslav Sykora, Lukas Kohout, Petr Honzík. 1-2 [doi]
- Virtualization of heterogeneous and adaptive multi-core/multi-board systemsOliver Oey, Stephan Werner, Diana Göhringer, Andreas Stuckert, Jürgen Becker, Michael Hübner. 1-2 [doi]
- Is FPGA a suitable platform for advanced video surveillance systems?Tomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon. 1-2 [doi]
- Design of fixed-point embedded systems (DEFIS) French ANR projectDaniel Menard, Romuald Rocher, Olivier Sentieys, N. Simon, L.-S. Didier, T. Hilaire, B. Lopez, Eric Goubault, Sylvie Putot, Franck Védrine, A. Najahi, Guillaume Revy, L. Fangain, Christian Samoyeau, Fabrice Lemonnier, Christophe Clienti. 1-2 [doi]
- An experimental toolchain based on high-level dataflow models of computation for heterogeneous MPSoCJulien Heulot, Karol Desnos, Jean-François Nezan, Maxime Pelcat, Mickaël Raulet, Hervé Yviquel, P.-L. Lagalaye, J.-C. Le Lann. 1-2 [doi]
- Parallel video-based traffic sign recognition on the Intel SCC many-core platformJan Micha Borrmann, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel. 1-2 [doi]
- Middleware based executive for embedded reconfigurable platformsAmel Khiar, N. Knecht, Laurent Gantel, S. Lkad, Benoit Miramond. 1-6 [doi]
- A low energy adaptive motion estimation hardware for H.264 Multiview Video CodingYusuf Aksehir, Kamil Erdayandi, Tevfik Zafer Ozcan, Ilker Hamzaoglu. 1-6 [doi]
- Gradient - An adaptive fault-tolerant routing algorithm for 2D mesh Network-on-ChipsIstas Pratomo, Sébastien Pillement. 1-8 [doi]
- High-speed camera with embedded FPGA processingUros Stevanovic, Michele Caselle, Suren Chilingaryan, A. Herth, Andreas Kopmann, Matthias Vogelgesang, M. Balzer, M. Weber. 1-2 [doi]
- Multi-standard trellis-based FEC decoderJean Dion, Marie-Hélène Hamon, Pierre Penard, Matthieu Arzel, Michel Jézéquel. 1-7 [doi]
- MEMSCOPT: A source-to-source compiler for dynamic code analysis and loop transformationsGrigoris Dimitroulakos, Christakis Lezos, Konstantinos Masselos. 1-2 [doi]
- A high performance and low energy intra prediction hardware for HEVC video decodingErcan Kalali, Yusuf Adibelli, Ilker Hamzaoglu. 1-8 [doi]
- Performance evaluation of total focusing method on GPP and GPUJason Lambert, Antoine Pedron, Guillaume Gens, Franck Bimbard, Lionel Lacassagne, Ekaterina Iakovleva. 1-8 [doi]
- A hierarchical approach to the out-of-order arrival of frames in video streaming applications on clustered MPSoCDaniela Genius, Khouloud Zine el Abidine. 1-8 [doi]
- Flexible front-end processing for software defined radio applications using application specific instruction-set processorsCarina Schmidt-Knorreck, Renaud Pacalet, Andreas Minwegen, Uwe Deidersen, Torsten Kempf, Raymond Knopp, Gerd Ascheid. 1-8 [doi]
- Black-box and white-box early power intent simulation and verification: Two novel approachesOns Mbarek, Alain Pegatoquet, Michel Auguin. 1-8 [doi]
- Programmable routers for efficient mapping of applications onto NoC-based MPSoCsManel Djemal, Robert de Simone, François Pêcheux, Franck Wajsbürt, Dumitru Potop-Butucaru, Zhen Zhang. 1-8 [doi]
- Tools for deploying dataflow models on FPGA targetsKaushik Ravindran, Arkadeb Ghosal, Rhishikesh Limaye, Hugo A. Andrade, Alejandro Asenjo, Takao Inoue, Douglas Kim, Ankita Prasad, Trung N. Tran, Mike Trimborn, Guoqiang Wang, Guang Yang. 1-2 [doi]
- High-throughput LDPC decoding using the RHS algorithmFrançois Leduc-Primeau, Alexandre J. Raymond, Pascal Giard, Kevin Cushon, Claude Thibeault, Warren J. Gross. 1-6 [doi]
- FPGA based demonstrator for blocker detection in LTE systemsThomas Schlechter, Christoph Juritsch, Mario Huemer. 1-2 [doi]
- Analytical approach to evaluate the effect of the spread of quantization noise through the cascade of decision operators for spherical decodingA. Chakhari, Karthick Parashar, Romuald Rocher, Pascal Scalart. 1-5 [doi]
- On the scalability of image and signal processing parallel applications on emerging cc-NUMA many-coresGhassan Almaless, Franck Wajsbürt. 1-8 [doi]
- A generic video adaptation FPGA implementation towards content- and context-awareness in future networksWilly Aubry, Bertrand Le Gal, Daniel Negru, Simon Desfarges, Dominique Dallet. 1-7 [doi]
- GPU-based acceleration of symbol timing recoveryScott C. Kim, William Plishker, Shuvra S. Bhattacharyya, Joseph R. Cavallaro. 1-8 [doi]
- Energy-efficient heterogeneous reconfigurable sensor node for distributed structural health monitoringAndreas Engel, Björn Liebig, Andreas Koch 0001. 1-8 [doi]
- Sum-of-products evaluation schemes with fixed-point arithmetic, and their application to IIR filter implementationBenoit Lopez, Thibault Hilaire, Laurent-Stephane Didier. 1-8 [doi]
- Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow programAb Al Hadi Ab Rahman, Richard Thavot, Simone Casale Brunet, Endri Bezati, Marco Mattavelli. 1-8 [doi]
- Prototype of a radio-on-demand broadcast receiver with real time musical genre classificationBrunel Happi Tietche, Olivier Romain, Bruce Denby, L. Benaroya, Francois de Dieuleveult, Bertrand Granado, G. Wassi, Houssemeddine Khemiri, Gérard Chollet, Dijana Petrovska, R. Blouet, Khalil Hachicha, Sylvain Viateur. 1-2 [doi]
- Implementing large-kernel 2-D filters using Impulse CoDeveloperCarlos Colodro-Conde, F. Javier Toledo-Moreo, J. Javier Martínez-Álvarez, F. Javier Garrigós-Guerrero, José Manuel Ferrández de Vicente. 1-8 [doi]
- Design of fixed-point rounding operators for the VHDL-2008 standardNikolaos Kavvadias, Kostas Masselos. 1-8 [doi]
- Analysis techniques for static dataflow models with access patternsKaushik Ravindran, Arkadeb Ghosal, Rhishikesh Limaye, Guoqiang Wang, Guang Yang, Hugo A. Andrade. 1-8 [doi]
- GRECO: GREen communicating objectsOlivier Berder, Olivier Sentieys, Trong Nhan Le, R. Fontaine, Alain Pegatoquet, Cécile Belleudy, Michel Auguin, William Tatinian, Gilles Jacquemod, Florian Broekaert, Amine Didioui, Carolynn Bernier, K. Benchehida, Sylvain Bourdel, Hervé Barthélemy, P. Ciais, C. Barratt. 1-2 [doi]
- FPGA implementation of real-time head-shoulder detection using local binary patterns, SVM and foreground object detectionTomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon. 1-8 [doi]
- Range estimation of floating-point variables in Simulink modelsAlexandre Chapoutot, Laurent-Stephane Didier, Fanny Villers. 1-8 [doi]
- A nature-inspired adaptive floating-point coprocessing systemCarlo Sau, Danilo Pani, Francesca Palumbo, Luigi Raffo. 1-8 [doi]
- Many-core parallelization of fixed-point optimization of VLSI circuits through GPU devicesGabriel Caffarena, Daniel Menard. 1-8 [doi]
- Synthesis of arithmetic expressions for the fixed-point arithmetic: The Sardana approachArnault Ioualalen, Matthieu Martel. 1-8 [doi]
- Design under constraints of availability and energy for sensor node in wireless sensor networkVan-Trinh Hoang, Nathalie Julien, Pascal Berruet. 1-8 [doi]
- Empirical comparison of Chirp and Multitones on experimental UWB software defined radar prototypeJulien Le Kernec, Olivier Romain, Patrick Garda, Julien Denoulet. 1-8 [doi]
- HaLOEWEn: A heterogeneous reconfigurable sensor node for distributed structural health monitoringAndreas Engel, Björn Liebig, Andreas Koch 0001. 1-2 [doi]
- The COMPLEX Eclipse framework for UML/MARTE specification and design space exploration of embedded systemsFernando Herrera, Hector Posadas, Pablo Peñil, Eugenio Villar, Francisco Ferrero, Raúl Valencia. 1-2 [doi]
- Open-people: An open platform for estimation and optimizations of energy consumptionEric Senn, Daniel Chillet, Olivier Zendra, Cécile Belleudy, Rabie Ben Atitallah, A. Fritsch, Christian Samoyeau. 1-2 [doi]
- HLS-based fast design space exploration of ad hoc hardware accelerators: A key tool for MPSoC synthesis on FPGAYouenn Corre, Van-Trinh Hoang, Jean-Philippe Diguet, Dominique Heller, Loïc Lagadec. 1-8 [doi]
- Noise probability density function in fixed-point systems based on smooth operatorsRomuald Rocher, Pascal Scalart. 1-8 [doi]
- An evaluation on using GPU coprocessing for software radios on a low-cost platformLothar Stolz, Matthias Ihmig, Walter Stechele. 1-8 [doi]
- A portable demonstration device for an integrated optical angle measurement systemJürgen Oehm, Christian Koch, Ivan Stoychev, Andreas Gornik. 1-2 [doi]
- XMSIM: A tool for early memory hierarchy evaluationGrigoris Dimitroulakos, Theodoros Lioris, Christakis Lezos, Konstantinos Masselos. 1-2 [doi]
- Consumption analysis and estimation in the design of GStreamer based multimedia applicationsMickael Lanoe, Eric Senn. 1-7 [doi]
- FPGA implementation of camera tamper detection in real-timeTomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon. 1-8 [doi]
- GAMPIX: A new generation of gamma cameraFrederick Carrel, Mehdi Gmar, Hermine Lemaire, Vincent Schoepff, Mathieu Thevenin. 1-2 [doi]
- Layered detection and decoding in MIMO wireless systemsNicholas Preyss, Andreas Burg, Christoph Studer. 1-8 [doi]
- Partitioning and context switching for a reconfigurable FPGA-based DAB receiverMichael Feilen, Andreas Iliopoulos, Matthias Ihmig, Walter Stechele. 1-8 [doi]
- Optimal low power and scalable memory architecture for Turbo encoderVenugopal Santhanam, Lokesh Kabra. 1-8 [doi]
- A hierarchical implementation of Hadamard transform using RVC-CAL dataflow programming and dynamic partial reconfigurationManel Hentati, Yassine Aoudni, Jean-François Nezan, Mohamed Abid. 1-7 [doi]