Vahid Lari - researchr alias

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Viewing Publication 1 - 22 from 22

2017

Power Density-Aware Resource Management for Heterogeneous Tiled MulticoresHeba Khdr, Santiago Pagani, Ericles Rodrigues Sousa, Vahid Lari, Anuj Pathania, Frank Hannig, Muhammad Shafique, Jürgen Teich, Jörg Henkel. TC, 66(3):488-501, 2017. [doi]

2016

Invasive tightly coupled processor arrays = Invasive eng gekoppelte ProzessorfelderVahid Lari. PhD thesis, University of Erlangen-Nuremberg, Germany, 2016. [doi]

Providing fault tolerance through invasive computingVahid Lari, Andreas Weichslgartner, Alexandru Tanase, Michael Witterauf, Faramarz Khosravi, Jürgen Teich, Jan Heißwolf, Stephanie Friederich, Jürgen Becker. it, 58(6):309-328, 2016. [doi]

2015

A co-design approach for fault-tolerant loop execution on Coarse-Grained Reconfigurable ArraysVahid Lari, Alexandru Tanase, Jürgen Teich, Michael Witterauf, Faramarz Khosravi, Frank Hannig, Brett H. Meyer. ahs 2015: 1-8 [doi]

Techniques for on-demand structural redundancy for massively parallel processor arraysVahid Lari, Jürgen Teich, Alexandru Tanase, Michael Witterauf, Faramarz Khosravi, Brett H. Meyer. jsa, 61(10):615-627, 2015. [doi]

Resource-awareness on heterogeneous MPSoCs for image processingJohny Paul, Walter Stechele, Benjamin Oechslein, Christoph Erhardt, Jens Schedel, Daniel Lohmann, Wolfgang Schröder-Preikschat, Manfred Kröhnert, Tamim Asfour, Ericles Rodrigues Sousa, Vahid Lari, Frank Hannig, Jürgen Teich, Artjom Grudnitsky, Lars Bauer, Jörg Henkel. jsa, 61(10):668-680, 2015. [doi]

On-demand fault-tolerant loop processing on massively parallel processor arraysAlexandru Tanase, Michael Witterauf, Jürgen Teich, Frank Hannig, Vahid Lari. asap 2015: 194-201 [doi]

Adaptive fault tolerance through invasive computingMichael Witterauf, Alexandru Tanase, Jürgen Teich, Vahid Lari, Andreas Zwinkau, Gregor Snelting. ahs 2015: 1-8 [doi]

2014

2013

System integration of tightly-coupled processor arrays using reconfigurable buffer structuresFrank Hannig, Moritz Schmid, Vahid Lari, Srinivas Boppu, Jürgen Teich. cf 2013: 2 [doi]

Exploitation of Quality/Throughput Tradeoffs in Image Processing through Invasive ComputingAlexandru Tanase, Vahid Lari, Frank Hannig, Jürgen Teich. parco 2014: 53-62 [doi]

2012

2011

Distributed Resource Reservation in Massively Parallel Processor ArraysVahid Lari, Frank Hannig, Jürgen Teich. ipps 2011: 318-321 [doi]

Decentralized dynamic resource management support for massively parallel processor arraysVahid Lari, Andriy Narovlyanskyy, Frank Hannig, Jürgen Teich. asap 2011: 87-94 [doi]

2009

System Integration of Tightly-Coupled Reconfigurable Processor Arrays and Evaluation of Buffer Size Effects on Their PerformanceVahid Lari, Frank Hannig, JÃ¼rgen Teich. icppw 2009: 528-534 [doi]

2008

Fault Effects in FlexRay-Based Networks with Hybrid TopologyMehdi Dehbashi, Vahid Lari, Seyed Ghassem Miremadi, Mohammad Shokrollah-Shirazi. IEEEares 2008: 491-496 [doi]

2007

Assessment of Message Missing Failures in FlexRay-Based NetworksVahid Lari, Mehdi Dehbashi, Seyed Ghassem Miremadi, Navid Farazmand. prdc 2007: 191-194 [doi]

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