A superscalar architecture to exploit instruction level parallelism

Gordon B. Steven, Bruce Christianson, Roger Collins, Richard D. Potter, Fleur L. Steven. A superscalar architecture to exploit instruction level parallelism. Microprocessors and Microsystems, 20(7):391-400, 1997. [doi]

@article{StevenCCPS97,
  title = {A superscalar architecture to exploit instruction level parallelism},
  author = {Gordon B. Steven and Bruce Christianson and Roger Collins and Richard D. Potter and Fleur L. Steven},
  year = {1997},
  doi = {10.1016/S0141-9331(96)01101-5},
  url = {http://dx.doi.org/10.1016/S0141-9331(96)01101-5},
  researchr = {https://researchr.org/publication/StevenCCPS97},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {20},
  number = {7},
  pages = {391-400},
}