Greg Stitt, Gaurav Chaudhari, James Coole. Traversal caches: a first step towards FPGA acceleration of pointer-based data structures. In Catherine H. Gebotys, Grant Martin, editors, Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008. pages 61-66, ACM, 2008. [doi]
@inproceedings{StittCC08,
title = {Traversal caches: a first step towards FPGA acceleration of pointer-based data structures},
author = {Greg Stitt and Gaurav Chaudhari and James Coole},
year = {2008},
doi = {10.1145/1450135.1450150},
url = {http://doi.acm.org/10.1145/1450135.1450150},
tags = {rule-based, caching, traversal},
researchr = {https://researchr.org/publication/StittCC08},
cites = {0},
citedby = {0},
pages = {61-66},
booktitle = {Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008},
editor = {Catherine H. Gebotys and Grant Martin},
publisher = {ACM},
isbn = {978-1-60558-470-6},
}