A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors

Vladimir Stojanovic, R. Iris Bahar, Jennifer Dworak, Richard Weiss. A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors. In Ellen Sentovich, editor, Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006. pages 705-708, ACM, 2006. [doi]

@inproceedings{StojanovicBDW06,
  title = {A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors},
  author = {Vladimir Stojanovic and R. Iris Bahar and Jennifer Dworak and Richard Weiss},
  year = {2006},
  doi = {10.1145/1146909.1147087},
  url = {http://doi.acm.org/10.1145/1146909.1147087},
  researchr = {https://researchr.org/publication/StojanovicBDW06},
  cites = {0},
  citedby = {0},
  pages = {705-708},
  booktitle = {Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006},
  editor = {Ellen Sentovich},
  publisher = {ACM},
  isbn = {1-59593-381-6},
}