R. Jacob Baker, CMOS Circuit Design, Layout, and Simulation (second ed.), Wiley Interscience & IEEE Press (2005) ISBN 0-471-70055-X Hardcover, pp 1039, plus XXXIII

Mile K. Stojcev. R. Jacob Baker, CMOS Circuit Design, Layout, and Simulation (second ed.), Wiley Interscience & IEEE Press (2005) ISBN 0-471-70055-X Hardcover, pp 1039, plus XXXIII. Microelectronics Reliability, 46(7):1214-1215, 2006. [doi]

@article{Stojcev06f,
  title = {R. Jacob Baker, CMOS Circuit Design, Layout, and Simulation (second ed.), Wiley Interscience & IEEE Press (2005) ISBN 0-471-70055-X Hardcover, pp 1039, plus XXXIII},
  author = {Mile K. Stojcev},
  year = {2006},
  doi = {10.1016/j.microrel.2005.09.006},
  url = {http://dx.doi.org/10.1016/j.microrel.2005.09.006},
  tags = {layout, design},
  researchr = {https://researchr.org/publication/Stojcev06f},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {46},
  number = {7},
  pages = {1214-1215},
}