Yehua Su, Wenjing Rao. Runtime analysis for defect-tolerant logic mapping on nanoscale crossbar architectures. In 2009 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2009, San Francisco, CA, USA, July 30-31, 2009. pages 75-78, IEEE Computer Society, 2009. [doi]
@inproceedings{SuR09-0,
title = {Runtime analysis for defect-tolerant logic mapping on nanoscale crossbar architectures},
author = {Yehua Su and Wenjing Rao},
year = {2009},
url = {http://dl.acm.org/citation.cfm?id=1936823},
researchr = {https://researchr.org/publication/SuR09-0},
cites = {0},
citedby = {0},
pages = {75-78},
booktitle = {2009 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2009, San Francisco, CA, USA, July 30-31, 2009},
publisher = {IEEE Computer Society},
isbn = {978-1-4244-4958-3},
}