Yehua Su, Wenjing Rao. Runtime analysis for defect-tolerant logic mapping on nanoscale crossbar architectures. In 2009 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2009, San Francisco, CA, USA, July 30-31, 2009. pages 75-78, IEEE Computer Society, 2009. [doi]
Abstract is missing.