FPGA-Based Hardware Accelerator for an Embedded Factor Graph with Configurable Optimization

Indar Sugiarto, Cristian Axenie, Jörg Conradt. FPGA-Based Hardware Accelerator for an Embedded Factor Graph with Configurable Optimization. Journal of Circuits, Systems, and Computers, 28(2):1950031, 2019. [doi]

Authors

Indar Sugiarto

This author has not been identified. Look up 'Indar Sugiarto' in Google

Cristian Axenie

This author has not been identified. Look up 'Cristian Axenie' in Google

Jörg Conradt

This author has not been identified. Look up 'Jörg Conradt' in Google