FPGA-Based Hardware Accelerator for an Embedded Factor Graph with Configurable Optimization

Indar Sugiarto, Cristian Axenie, Jörg Conradt. FPGA-Based Hardware Accelerator for an Embedded Factor Graph with Configurable Optimization. Journal of Circuits, Systems, and Computers, 28(2):1950031, 2019. [doi]

@article{SugiartoAC19,
  title = {FPGA-Based Hardware Accelerator for an Embedded Factor Graph with Configurable Optimization},
  author = {Indar Sugiarto and Cristian Axenie and Jörg Conradt},
  year = {2019},
  doi = {10.1142/S0218126619500312},
  url = {https://doi.org/10.1142/S0218126619500312},
  researchr = {https://researchr.org/publication/SugiartoAC19},
  cites = {0},
  citedby = {0},
  journal = {Journal of Circuits, Systems, and Computers},
  volume = {28},
  number = {2},
  pages = {1950031},
}