Yasuhiro Sugimoto. A 1.5-V current-mode CMOS sample-and-hold IC with 57-dB S/N at 20 MS/s and 54-dB S/N at 30 MS/s. J. Solid-State Circuits, 36(4):696-700, 2001. [doi]
@article{Sugimoto01,
title = {A 1.5-V current-mode CMOS sample-and-hold IC with 57-dB S/N at 20 MS/s and 54-dB S/N at 30 MS/s},
author = {Yasuhiro Sugimoto},
year = {2001},
doi = {10.1109/4.913749},
url = {https://doi.org/10.1109/4.913749},
researchr = {https://researchr.org/publication/Sugimoto01},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {36},
number = {4},
pages = {696-700},
}