Naoki Sugiyama, Hiroshi Noto, Yoshito Nishigami, Ryosuke Oda, Takao Waho. A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison. In 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 26-28 May 2010. pages 325-330, IEEE Computer Society, 2010. [doi]
@inproceedings{SugiyamaNNOW10,
title = {A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison},
author = {Naoki Sugiyama and Hiroshi Noto and Yoshito Nishigami and Ryosuke Oda and Takao Waho},
year = {2010},
doi = {10.1109/ISMVL.2010.66},
url = {http://doi.ieeecomputersociety.org/10.1109/ISMVL.2010.66},
tags = {rule-based},
researchr = {https://researchr.org/publication/SugiyamaNNOW10},
cites = {0},
citedby = {0},
pages = {325-330},
booktitle = {40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 26-28 May 2010},
publisher = {IEEE Computer Society},
isbn = {978-0-7695-4024-5},
}