A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison

Naoki Sugiyama, Hiroshi Noto, Yoshito Nishigami, Ryosuke Oda, Takao Waho. A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison. In 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 26-28 May 2010. pages 325-330, IEEE Computer Society, 2010. [doi]

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