A 1.8 V, 2.0 ns cycle, 32 KB embedded memory with interleaved castout/reload - researchr publication authors

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Steven Sullivan, Brad R. Johnson, Douglas Reid, Scott A. Taylor. A 1.8 V, 2.0 ns cycle, 32 KB embedded memory with interleaved castout/reload. In Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, CICC 1999, San Diego, CA, USA, May 1649,1999. pages 235-238, IEEE, 1999. [doi]

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