Design of a Power Efficient Pulse Latch Circuit as a Solution for Master Slave Flip-Flop - researchr publication authors

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Muneeb Sulthan, Shubhajit Roy Chowdury, Rajnish Garg, Alok Tripathi. Design of a Power Efficient Pulse Latch Circuit as a Solution for Master Slave Flip-Flop. In Anirban Sengupta, Sudeb Dasgupta, Virendra Singh, Rohit Sharma, Santosh Kumar Vishvakarma, editors, VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers. Volume 1066 of Communications in Computer and Information Science, pages 532-540, Springer, 2019. [doi]

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