UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery in 65nm CMOS

Xun Sun, Akshat Boora, Rajesh Pamula 0001, Chi-Hsiang Huang, Diego Peña-Colaiocco, Visvesh S. Sathe 0001. UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery in 65nm CMOS. In IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020. pages 1-2, IEEE, 2020. [doi]

@inproceedings{SunB0HP020,
  title = {UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery in 65nm CMOS},
  author = {Xun Sun and Akshat Boora and Rajesh Pamula 0001 and Chi-Hsiang Huang and Diego Peña-Colaiocco and Visvesh S. Sathe 0001},
  year = {2020},
  doi = {10.1109/VLSICircuits18222.2020.9162982},
  url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162982},
  researchr = {https://researchr.org/publication/SunB0HP020},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-9942-9},
}