A High-Performance 64-bit Adder Implemented in Output Prediction Logic - researchr publication authors

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Sheng Sun, Larry McMurchie, Carl Sechen. A High-Performance 64-bit Adder Implemented in Output Prediction Logic. In 19th Conference on Advanced Research in VLSI (ARVLSI 2001), 14-16 March 2001, Salt Lake City, UT, USA. pages 213-223, IEEE Computer Society, 2001. [doi]

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