6.25-10Gb/s adaptive CTLE with spectrum balancing and loop-unrolled half-rate DFE in TSMC 0.18µm CMOS

Haoran Sun, Yinhang Zhang, Xi Yang. 6.25-10Gb/s adaptive CTLE with spectrum balancing and loop-unrolled half-rate DFE in TSMC 0.18µm CMOS. IEICE Electronic Express, 19(22):20220429, 2022. [doi]

@article{SunZY22-1,
  title = {6.25-10Gb/s adaptive CTLE with spectrum balancing and loop-unrolled half-rate DFE in TSMC 0.18µm CMOS},
  author = {Haoran Sun and Yinhang Zhang and Xi Yang},
  year = {2022},
  doi = {10.1587/elex.19.20220429},
  url = {https://doi.org/10.1587/elex.19.20220429},
  researchr = {https://researchr.org/publication/SunZY22-1},
  cites = {0},
  citedby = {0},
  journal = {IEICE Electronic Express},
  volume = {19},
  number = {22},
  pages = {20220429},
}