Low power synthesis of dual threshold voltage CMOS VLSI circuits

Vijay Sundararajan, Keshab K. Parhi. Low power synthesis of dual threshold voltage CMOS VLSI circuits. In Farid N. Najm, Jason Cong, David Blaauw, editors, Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999, San Diego, California, USA, August 16-17, 1999. pages 139-144, ACM, 1999. [doi]

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